libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
i2c_common.h
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1/** @addtogroup i2c_defines
2 */
3/*
4 * This file is part of the libopencm3 project.
5 *
6 * Copyright (C) 2015 Kuldeep Singh Dhaka <kuldeepdhaka9@gmail.com>
7 *
8 * This library is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU Lesser General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public License
19 * along with this library. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#pragma once
23
26
27/**@{*/
28
29#define I2C_CTRL(base) MMIO32((base) + 0x000)
30#define I2C_CMD(base) MMIO32((base) + 0x004)
31#define I2C_STATE(base) MMIO32((base) + 0x008)
32#define I2C_STATUS(base) MMIO32((base) + 0x00C)
33#define I2C_CLKDIV(base) MMIO32((base) + 0x010)
34#define I2C_SADDR(base) MMIO32((base) + 0x014)
35#define I2C_SADDRMASK(base) MMIO32((base) + 0x018)
36#define I2C_RXDATA(base) MMIO32((base) + 0x01C)
37#define I2C_RXDATAP(base) MMIO32((base) + 0x020)
38#define I2C_TXDATA(base) MMIO32((base) + 0x024)
39#define I2C_IF(base) MMIO32((base) + 0x028)
40#define I2C_IFS(base) MMIO32((base) + 0x02C)
41#define I2C_IFC(base) MMIO32((base) + 0x030)
42#define I2C_IEN(base) MMIO32((base) + 0x034)
43#define I2C_ROUTE(base) MMIO32((base) + 0x038)
44
45/* I2C_CTRL */
46#define I2C_CTRL_CLTO_SHIFT (16)
47#define I2C_CTRL_CLTO_MASK (0x7 << I2C_CTRL_CLTO_SHIFT)
48#define I2C_CTRL_CLTO(v) \
49 (((v) << I2C_CTRL_CLTO_SHIFT) & I2C_CTRL_CLTO_MASK)
50#define I2C_CTRL_CLTO_OFF 0
51#define I2C_CTRL_CLTO_40PCC 1
52#define I2C_CTRL_CLTO_80PCC 2
53#define I2C_CTRL_CLTO_160PCC 3
54#define I2C_CTRL_CLTO_320PPC 4
55#define I2C_CTRL_CLTO_1024PPC 5
56
57#define I2C_CTRL_GIBITO (1 << 15)
58
59#define I2C_CTRL_BTO_SHIFT (12)
60#define I2C_CTRL_BTO_MASK (0x3 << I2C_CTRL_BTO_SHIFT)
61#define I2C_CTRL_BTO(v) \
62 (((v) << I2C_CTRL_BTO_SHIFT) & I2C_CTRL_BTO_MASK)
63#define I2C_CTRL_BTO_OFF 0
64#define I2C_CTRL_BTO_40PCC 1
65#define I2C_CTRL_BTO_80PCC 2
66#define I2C_CTRL_BTO_160PCC 3
67
68#define I2C_CTRL_CLHR_SHIFT (12)
69#define I2C_CTRL_CLHR_MASK (0x3 << I2C_CTRL_CLHR_SHIFT)
70#define I2C_CTRL_CLHR(v) \
71 (((v) << I2C_CTRL_CLHR_SHIFT) & I2C_CTRL_CLHR_MASK)
72#define I2C_CTRL_CLHR_STANDARD 0
73#define I2C_CTRL_CLHR_ASYMMETRIC 1
74#define I2C_CTRL_CLHR_FAST 2
75
76#define I2C_CTRL_GCAMEN (1 << 6)
77#define I2C_CTRL_ARBDIS (1 << 5)
78#define I2C_CTRL_AUTOSN (1 << 4)
79#define I2C_CTRL_AUTOSE (1 << 3)
80#define I2C_CTRL_AUTOACK (1 << 2)
81#define I2C_CTRL_SLAVE (1 << 1)
82#define I2C_CTRL_EN (1 << 0)
83
84/* I2C_CMD */
85#define I2C_CMD_CLEARPC (1 << 7)
86#define I2C_CMD_CLEARTX (1 << 6)
87#define I2C_CMD_ABORT (1 << 5)
88#define I2C_CMD_CONT (1 << 4)
89#define I2C_CMD_NACK (1 << 3)
90#define I2C_CMD_ACK (1 << 2)
91#define I2C_CMD_STOP (1 << 1)
92#define I2C_CMD_START (1 << 0)
93
94/* I2C_STATE */
95#define I2C_STATE_STATE_SHIFT (5)
96#define I2C_STATE_STATE_MASK (0x7 << I2C_STATE_STATE_SHIFT)
97#define I2C_STATE_STATE(v) \
98 (((v) << I2C_STATE_STATE_SHIFT) & I2C_STATE_STATE_MASK)
99#define I2C_STATE_STATE_IDLE 0
100#define I2C_STATE_STATE_WAIT 1
101#define I2C_STATE_STATE_START 2
102#define I2C_STATE_STATE_ADDR 3
103#define I2C_STATE_STATE_ADDRACK 4
104#define I2C_STATE_STATE_DATA 5
105#define I2C_STATE_STATE_DATAACK 6
106
107#define I2C_STATE_BUSHOLD (1 << 4)
108#define I2C_STATE_NACKED (1 << 3)
109#define I2C_STATE_TRANSMITTER (1 << 2)
110#define I2C_STATE_MASTER (1 << 1)
111#define I2C_STATE_BUSY (1 << 0)
112
113/* I2C_STATUS */
114#define I2C_STATUS_RXDATAV (1 << 8)
115#define I2C_STATUS_TXBL (1 << 7)
116#define I2C_STATUS_TXC (1 << 6)
117#define I2C_STATUS_PABORT (1 << 5)
118#define I2C_STATUS_PCONT (1 << 4)
119#define I2C_STATUS_PNACK (1 << 3)
120#define I2C_STATUS_PACK (1 << 2)
121#define I2C_STATUS_PSTOP (1 << 1)
122#define I2C_STATUS_PSTART (1 << 0)
123
124/* I2C_CLKDIV */
125#define I2C_CLKDIV_DIV_SHIFT (0)
126#define I2C_CLKDIV_DIV_MASK (0xFF << I2C_CLKDIV_DIV_SHIFT)
127#define I2C_CLKDIV_DIV(v) \
128 (((v) << I2C_CLKDIV_DIV_SHIFT) & I2C_CLKDIV_DIV_MASK)
129
130/* I2C_SADDR */
131#define I2C_SADDR_ADDR_SHIFT (0)
132#define I2C_SADDR_ADDR_MASK (0xFF << I2C_SADDR_ADDR_SHIFT)
133#define I2C_SADDR_ADDR(v) \
134 (((v) << I2C_SADDR_ADDR_SHIFT) & I2C_SADDR_ADDR_MASK)
135
136/* I2C_SADDRMASK */
137#define I2C_SADDRMASK_MASK_SHIFT (0)
138#define I2C_SADDRMASK_MASK_MASK (0xFF << I2C_SADDRMASK_MASK_SHIFT)
139#define I2C_SADDRMASK_MASK(v) \
140 (((v) << I2C_SADDRMASK_MASK_SHIFT) & I2C_SADDRMASK_MASK_MASK)
141
142/* I2C_IF */
143#define I2C_IF_SSTOP (1 << 16)
144#define I2C_IF_CLTO (1 << 15)
145#define I2C_IF_BITO (1 << 14)
146#define I2C_IF_RXUF (1 << 13)
147#define I2C_IF_TXOF (1 << 12)
148#define I2C_IF_BUSHOLD (1 << 11)
149#define I2C_IF_BUSERR (1 << 10)
150#define I2C_IF_ARBLOST (1 << 9)
151#define I2C_IF_MSTOP (1 << 8)
152#define I2C_IF_NACK (1 << 7)
153#define I2C_IF_ACK (1 << 6)
154#define I2C_IF_RXDATAV (1 << 5)
155#define I2C_IF_TXBL (1 << 4)
156#define I2C_IF_TXC (1 << 3)
157#define I2C_IF_ADDR (1 << 2)
158#define I2C_IF_RSTART (1 << 1)
159#define I2C_IF_START (1 << 0)
160
161/* I2C_IFS */
162#define I2C_IFS_SSTOP (1 << 16)
163#define I2C_IFS_CLTO (1 << 15)
164#define I2C_IFS_BITO (1 << 14)
165#define I2C_IFS_RXUF (1 << 13)
166#define I2C_IFS_TXOF (1 << 12)
167#define I2C_IFS_BUSHOLD (1 << 11)
168#define I2C_IFS_BUSERR (1 << 10)
169#define I2C_IFS_ARBLOST (1 << 9)
170#define I2C_IFS_MSTOP (1 << 8)
171#define I2C_IFS_NACK (1 << 7)
172#define I2C_IFS_ACK (1 << 6)
173#define I2C_IFS_RXDATAV (1 << 5)
174#define I2C_IFS_TXBL (1 << 4)
175#define I2C_IFS_TXC (1 << 3)
176#define I2C_IFS_ADDR (1 << 2)
177#define I2C_IFS_RSTART (1 << 1)
178#define I2C_IFS_START (1 << 0)
179
180/* I2C_IFC */
181#define I2C_IFC_SSTOP (1 << 16)
182#define I2C_IFC_CLTO (1 << 15)
183#define I2C_IFC_BITO (1 << 14)
184#define I2C_IFC_RXUF (1 << 13)
185#define I2C_IFC_TXOF (1 << 12)
186#define I2C_IFC_BUSHOLD (1 << 11)
187#define I2C_IFC_BUSERR (1 << 10)
188#define I2C_IFC_ARBLOST (1 << 9)
189#define I2C_IFC_MSTOP (1 << 8)
190#define I2C_IFC_NACK (1 << 7)
191#define I2C_IFC_ACK (1 << 6)
192#define I2C_IFC_RXDATAV (1 << 5)
193#define I2C_IFC_TXBL (1 << 4)
194#define I2C_IFC_TXC (1 << 3)
195#define I2C_IFC_ADDR (1 << 2)
196#define I2C_IFC_RSTART (1 << 1)
197#define I2C_IFC_START (1 << 0)
198
199/* I2C_IEN */
200#define I2C_IEN_SSTOP (1 << 16)
201#define I2C_IEN_CLTO (1 << 15)
202#define I2C_IEN_BITO (1 << 14)
203#define I2C_IEN_RXUF (1 << 13)
204#define I2C_IEN_TXOF (1 << 12)
205#define I2C_IEN_BUSHOLD (1 << 11)
206#define I2C_IEN_BUSERR (1 << 10)
207#define I2C_IEN_ARBLOST (1 << 9)
208#define I2C_IEN_MSTOP (1 << 8)
209#define I2C_IEN_NACK (1 << 7)
210#define I2C_IEN_ACK (1 << 6)
211#define I2C_IEN_RXDATAV (1 << 5)
212#define I2C_IEN_TXBL (1 << 4)
213#define I2C_IEN_TXC (1 << 3)
214#define I2C_IEN_ADDR (1 << 2)
215#define I2C_IEN_RSTART (1 << 1)
216#define I2C_IEN_START (1 << 0)
217
218/* I2C_ROUTE */
219#define I2C_ROUTE_LOCATION_SHIFT (8)
220#define I2C_ROUTE_LOCATION_MASK (0x7 << I2C_ROUTE_LOCATION_SHIFT)
221#define I2C_ROUTE_LOCATION(v) \
222 (((v) << I2C_ROUTE_LOCATION_SHIFT) & I2C_ROUTE_LOCATION_MASK)
223#define I2C_ROUTE_LOCATION_LOCx(x) I2C_ROUTE_LOCATION(x)
224#define I2C_ROUTE_LOCATION_LOC0 0
225#define I2C_ROUTE_LOCATION_LOC1 1
226#define I2C_ROUTE_LOCATION_LOC2 2
227#define I2C_ROUTE_LOCATION_LOC3 3
228#define I2C_ROUTE_LOCATION_LOC4 4
229#define I2C_ROUTE_LOCATION_LOC5 5
230#define I2C_ROUTE_LOCATION_LOC6 6
231
232#define I2C_ROUTE_SCLPEN (1 << 1)
233#define I2C_ROUTE_SDAPEN (1 << 0)
234
235/* I2C0 */
236#define I2C0 I2C0_BASE
237#define I2C0_CTRL I2C_CTRL(I2C0)
238#define I2C0_CMD I2C_CMD(I2C0)
239#define I2C0_STATE I2C_STATE(I2C0)
240#define I2C0_STATUS I2C_STATUS(I2C0)
241#define I2C0_CLKDIV I2C_CLKDIV(I2C0)
242#define I2C0_SADDR I2C_SADDR(I2C0)
243#define I2C0_SADDRMASK I2C_SADDRMASK(I2C0)
244#define I2C0_RXDATA I2C_RXDATA(I2C0)
245#define I2C0_RXDATAP I2C_RXDATAP(I2C0)
246#define I2C0_TXDATA I2C_TXDATA(I2C0)
247#define I2C0_IF I2C_IF(I2C0)
248#define I2C0_IFS I2C_IFS(I2C0)
249#define I2C0_IFC I2C_IFC(I2C0)
250#define I2C0_IEN I2C_IEN(I2C0)
251#define I2C0_ROUTE I2C_ROUTE(I2C0)
252
253/* I2C1 */
254#define I2C1 I2C1_BASE
255#define I2C1_CTRL I2C_CTRL(I2C1)
256#define I2C1_CMD I2C_CMD(I2C1)
257#define I2C1_STATE I2C_STATE(I2C1)
258#define I2C1_STATUS I2C_STATUS(I2C1)
259#define I2C1_CLKDIV I2C_CLKDIV(I2C1)
260#define I2C1_SADDR I2C_SADDR(I2C1)
261#define I2C1_SADDRMASK I2C_SADDRMASK(I2C1)
262#define I2C1_RXDATA I2C_RXDATA(I2C1)
263#define I2C1_RXDATAP I2C_RXDATAP(I2C1)
264#define I2C1_TXDATA I2C_TXDATA(I2C1)
265#define I2C1_IF I2C_IF(I2C1)
266#define I2C1_IFS I2C_IFS(I2C1)
267#define I2C1_IFC I2C_IFC(I2C1)
268#define I2C1_IEN I2C_IEN(I2C1)
269#define I2C1_ROUTE I2C_ROUTE(I2C1)
270
271/**@}*/
Dispatcher for the base address definitions, depending on the particular Gecko family.