libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
i2c_common.h
Go to the documentation of this file.
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/** @addtogroup i2c_defines
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2015 Kuldeep Singh Dhaka <kuldeepdhaka9@gmail.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include <
libopencm3/efm32/memorymap.h
>
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#include <
libopencm3/cm3/common.h
>
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/**@{*/
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#define I2C_CTRL(base) MMIO32((base) + 0x000)
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#define I2C_CMD(base) MMIO32((base) + 0x004)
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#define I2C_STATE(base) MMIO32((base) + 0x008)
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#define I2C_STATUS(base) MMIO32((base) + 0x00C)
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#define I2C_CLKDIV(base) MMIO32((base) + 0x010)
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#define I2C_SADDR(base) MMIO32((base) + 0x014)
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#define I2C_SADDRMASK(base) MMIO32((base) + 0x018)
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#define I2C_RXDATA(base) MMIO32((base) + 0x01C)
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#define I2C_RXDATAP(base) MMIO32((base) + 0x020)
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#define I2C_TXDATA(base) MMIO32((base) + 0x024)
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#define I2C_IF(base) MMIO32((base) + 0x028)
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#define I2C_IFS(base) MMIO32((base) + 0x02C)
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#define I2C_IFC(base) MMIO32((base) + 0x030)
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#define I2C_IEN(base) MMIO32((base) + 0x034)
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#define I2C_ROUTE(base) MMIO32((base) + 0x038)
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/* I2C_CTRL */
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#define I2C_CTRL_CLTO_SHIFT (16)
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#define I2C_CTRL_CLTO_MASK (0x7 << I2C_CTRL_CLTO_SHIFT)
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#define I2C_CTRL_CLTO(v) \
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(((v) << I2C_CTRL_CLTO_SHIFT) & I2C_CTRL_CLTO_MASK)
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#define I2C_CTRL_CLTO_OFF 0
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#define I2C_CTRL_CLTO_40PCC 1
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#define I2C_CTRL_CLTO_80PCC 2
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#define I2C_CTRL_CLTO_160PCC 3
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#define I2C_CTRL_CLTO_320PPC 4
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#define I2C_CTRL_CLTO_1024PPC 5
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#define I2C_CTRL_GIBITO (1 << 15)
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#define I2C_CTRL_BTO_SHIFT (12)
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#define I2C_CTRL_BTO_MASK (0x3 << I2C_CTRL_BTO_SHIFT)
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#define I2C_CTRL_BTO(v) \
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(((v) << I2C_CTRL_BTO_SHIFT) & I2C_CTRL_BTO_MASK)
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#define I2C_CTRL_BTO_OFF 0
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#define I2C_CTRL_BTO_40PCC 1
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#define I2C_CTRL_BTO_80PCC 2
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#define I2C_CTRL_BTO_160PCC 3
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#define I2C_CTRL_CLHR_SHIFT (12)
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#define I2C_CTRL_CLHR_MASK (0x3 << I2C_CTRL_CLHR_SHIFT)
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#define I2C_CTRL_CLHR(v) \
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(((v) << I2C_CTRL_CLHR_SHIFT) & I2C_CTRL_CLHR_MASK)
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#define I2C_CTRL_CLHR_STANDARD 0
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#define I2C_CTRL_CLHR_ASYMMETRIC 1
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#define I2C_CTRL_CLHR_FAST 2
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#define I2C_CTRL_GCAMEN (1 << 6)
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#define I2C_CTRL_ARBDIS (1 << 5)
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#define I2C_CTRL_AUTOSN (1 << 4)
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#define I2C_CTRL_AUTOSE (1 << 3)
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#define I2C_CTRL_AUTOACK (1 << 2)
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#define I2C_CTRL_SLAVE (1 << 1)
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#define I2C_CTRL_EN (1 << 0)
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/* I2C_CMD */
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#define I2C_CMD_CLEARPC (1 << 7)
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#define I2C_CMD_CLEARTX (1 << 6)
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#define I2C_CMD_ABORT (1 << 5)
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#define I2C_CMD_CONT (1 << 4)
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#define I2C_CMD_NACK (1 << 3)
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#define I2C_CMD_ACK (1 << 2)
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#define I2C_CMD_STOP (1 << 1)
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#define I2C_CMD_START (1 << 0)
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/* I2C_STATE */
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#define I2C_STATE_STATE_SHIFT (5)
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#define I2C_STATE_STATE_MASK (0x7 << I2C_STATE_STATE_SHIFT)
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#define I2C_STATE_STATE(v) \
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(((v) << I2C_STATE_STATE_SHIFT) & I2C_STATE_STATE_MASK)
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#define I2C_STATE_STATE_IDLE 0
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#define I2C_STATE_STATE_WAIT 1
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#define I2C_STATE_STATE_START 2
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#define I2C_STATE_STATE_ADDR 3
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#define I2C_STATE_STATE_ADDRACK 4
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#define I2C_STATE_STATE_DATA 5
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#define I2C_STATE_STATE_DATAACK 6
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#define I2C_STATE_BUSHOLD (1 << 4)
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#define I2C_STATE_NACKED (1 << 3)
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#define I2C_STATE_TRANSMITTER (1 << 2)
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#define I2C_STATE_MASTER (1 << 1)
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#define I2C_STATE_BUSY (1 << 0)
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/* I2C_STATUS */
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#define I2C_STATUS_RXDATAV (1 << 8)
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#define I2C_STATUS_TXBL (1 << 7)
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#define I2C_STATUS_TXC (1 << 6)
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#define I2C_STATUS_PABORT (1 << 5)
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#define I2C_STATUS_PCONT (1 << 4)
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#define I2C_STATUS_PNACK (1 << 3)
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#define I2C_STATUS_PACK (1 << 2)
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#define I2C_STATUS_PSTOP (1 << 1)
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#define I2C_STATUS_PSTART (1 << 0)
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/* I2C_CLKDIV */
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#define I2C_CLKDIV_DIV_SHIFT (0)
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#define I2C_CLKDIV_DIV_MASK (0xFF << I2C_CLKDIV_DIV_SHIFT)
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#define I2C_CLKDIV_DIV(v) \
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(((v) << I2C_CLKDIV_DIV_SHIFT) & I2C_CLKDIV_DIV_MASK)
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/* I2C_SADDR */
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#define I2C_SADDR_ADDR_SHIFT (0)
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#define I2C_SADDR_ADDR_MASK (0xFF << I2C_SADDR_ADDR_SHIFT)
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#define I2C_SADDR_ADDR(v) \
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(((v) << I2C_SADDR_ADDR_SHIFT) & I2C_SADDR_ADDR_MASK)
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/* I2C_SADDRMASK */
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#define I2C_SADDRMASK_MASK_SHIFT (0)
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#define I2C_SADDRMASK_MASK_MASK (0xFF << I2C_SADDRMASK_MASK_SHIFT)
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#define I2C_SADDRMASK_MASK(v) \
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(((v) << I2C_SADDRMASK_MASK_SHIFT) & I2C_SADDRMASK_MASK_MASK)
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/* I2C_IF */
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#define I2C_IF_SSTOP (1 << 16)
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#define I2C_IF_CLTO (1 << 15)
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#define I2C_IF_BITO (1 << 14)
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#define I2C_IF_RXUF (1 << 13)
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#define I2C_IF_TXOF (1 << 12)
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#define I2C_IF_BUSHOLD (1 << 11)
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#define I2C_IF_BUSERR (1 << 10)
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#define I2C_IF_ARBLOST (1 << 9)
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#define I2C_IF_MSTOP (1 << 8)
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#define I2C_IF_NACK (1 << 7)
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#define I2C_IF_ACK (1 << 6)
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#define I2C_IF_RXDATAV (1 << 5)
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#define I2C_IF_TXBL (1 << 4)
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#define I2C_IF_TXC (1 << 3)
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#define I2C_IF_ADDR (1 << 2)
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#define I2C_IF_RSTART (1 << 1)
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#define I2C_IF_START (1 << 0)
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/* I2C_IFS */
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#define I2C_IFS_SSTOP (1 << 16)
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#define I2C_IFS_CLTO (1 << 15)
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#define I2C_IFS_BITO (1 << 14)
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#define I2C_IFS_RXUF (1 << 13)
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#define I2C_IFS_TXOF (1 << 12)
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#define I2C_IFS_BUSHOLD (1 << 11)
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#define I2C_IFS_BUSERR (1 << 10)
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#define I2C_IFS_ARBLOST (1 << 9)
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#define I2C_IFS_MSTOP (1 << 8)
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#define I2C_IFS_NACK (1 << 7)
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#define I2C_IFS_ACK (1 << 6)
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#define I2C_IFS_RXDATAV (1 << 5)
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#define I2C_IFS_TXBL (1 << 4)
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#define I2C_IFS_TXC (1 << 3)
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#define I2C_IFS_ADDR (1 << 2)
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#define I2C_IFS_RSTART (1 << 1)
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#define I2C_IFS_START (1 << 0)
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/* I2C_IFC */
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#define I2C_IFC_SSTOP (1 << 16)
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#define I2C_IFC_CLTO (1 << 15)
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#define I2C_IFC_BITO (1 << 14)
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#define I2C_IFC_RXUF (1 << 13)
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#define I2C_IFC_TXOF (1 << 12)
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#define I2C_IFC_BUSHOLD (1 << 11)
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#define I2C_IFC_BUSERR (1 << 10)
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#define I2C_IFC_ARBLOST (1 << 9)
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#define I2C_IFC_MSTOP (1 << 8)
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#define I2C_IFC_NACK (1 << 7)
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#define I2C_IFC_ACK (1 << 6)
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#define I2C_IFC_RXDATAV (1 << 5)
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#define I2C_IFC_TXBL (1 << 4)
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#define I2C_IFC_TXC (1 << 3)
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#define I2C_IFC_ADDR (1 << 2)
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#define I2C_IFC_RSTART (1 << 1)
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#define I2C_IFC_START (1 << 0)
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/* I2C_IEN */
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#define I2C_IEN_SSTOP (1 << 16)
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#define I2C_IEN_CLTO (1 << 15)
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#define I2C_IEN_BITO (1 << 14)
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#define I2C_IEN_RXUF (1 << 13)
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#define I2C_IEN_TXOF (1 << 12)
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#define I2C_IEN_BUSHOLD (1 << 11)
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#define I2C_IEN_BUSERR (1 << 10)
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#define I2C_IEN_ARBLOST (1 << 9)
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#define I2C_IEN_MSTOP (1 << 8)
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#define I2C_IEN_NACK (1 << 7)
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#define I2C_IEN_ACK (1 << 6)
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#define I2C_IEN_RXDATAV (1 << 5)
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#define I2C_IEN_TXBL (1 << 4)
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#define I2C_IEN_TXC (1 << 3)
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#define I2C_IEN_ADDR (1 << 2)
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#define I2C_IEN_RSTART (1 << 1)
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#define I2C_IEN_START (1 << 0)
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/* I2C_ROUTE */
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#define I2C_ROUTE_LOCATION_SHIFT (8)
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#define I2C_ROUTE_LOCATION_MASK (0x7 << I2C_ROUTE_LOCATION_SHIFT)
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#define I2C_ROUTE_LOCATION(v) \
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(((v) << I2C_ROUTE_LOCATION_SHIFT) & I2C_ROUTE_LOCATION_MASK)
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#define I2C_ROUTE_LOCATION_LOCx(x) I2C_ROUTE_LOCATION(x)
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#define I2C_ROUTE_LOCATION_LOC0 0
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#define I2C_ROUTE_LOCATION_LOC1 1
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#define I2C_ROUTE_LOCATION_LOC2 2
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#define I2C_ROUTE_LOCATION_LOC3 3
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#define I2C_ROUTE_LOCATION_LOC4 4
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#define I2C_ROUTE_LOCATION_LOC5 5
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#define I2C_ROUTE_LOCATION_LOC6 6
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#define I2C_ROUTE_SCLPEN (1 << 1)
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#define I2C_ROUTE_SDAPEN (1 << 0)
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/* I2C0 */
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#define I2C0 I2C0_BASE
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#define I2C0_CTRL I2C_CTRL(I2C0)
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#define I2C0_CMD I2C_CMD(I2C0)
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#define I2C0_STATE I2C_STATE(I2C0)
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#define I2C0_STATUS I2C_STATUS(I2C0)
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#define I2C0_CLKDIV I2C_CLKDIV(I2C0)
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#define I2C0_SADDR I2C_SADDR(I2C0)
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#define I2C0_SADDRMASK I2C_SADDRMASK(I2C0)
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#define I2C0_RXDATA I2C_RXDATA(I2C0)
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#define I2C0_RXDATAP I2C_RXDATAP(I2C0)
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#define I2C0_TXDATA I2C_TXDATA(I2C0)
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#define I2C0_IF I2C_IF(I2C0)
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#define I2C0_IFS I2C_IFS(I2C0)
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#define I2C0_IFC I2C_IFC(I2C0)
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#define I2C0_IEN I2C_IEN(I2C0)
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#define I2C0_ROUTE I2C_ROUTE(I2C0)
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/* I2C1 */
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#define I2C1 I2C1_BASE
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#define I2C1_CTRL I2C_CTRL(I2C1)
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#define I2C1_CMD I2C_CMD(I2C1)
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#define I2C1_STATE I2C_STATE(I2C1)
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#define I2C1_STATUS I2C_STATUS(I2C1)
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#define I2C1_CLKDIV I2C_CLKDIV(I2C1)
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#define I2C1_SADDR I2C_SADDR(I2C1)
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#define I2C1_SADDRMASK I2C_SADDRMASK(I2C1)
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#define I2C1_RXDATA I2C_RXDATA(I2C1)
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#define I2C1_RXDATAP I2C_RXDATAP(I2C1)
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#define I2C1_TXDATA I2C_TXDATA(I2C1)
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#define I2C1_IF I2C_IF(I2C1)
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#define I2C1_IFS I2C_IFS(I2C1)
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#define I2C1_IFC I2C_IFC(I2C1)
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#define I2C1_IEN I2C_IEN(I2C1)
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#define I2C1_ROUTE I2C_ROUTE(I2C1)
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/**@}*/
common.h
memorymap.h
Dispatcher for the base address definitions, depending on the particular Gecko family.
include
libopencm3
efm32
common
i2c_common.h
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