libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
pac55xx/memorymap.h
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1/**
2 * @defgroup memorymap Peripheral Memory Map
3 *
4 * @ingroup PAC55xx_defines
5 * @author Brian Viele <vielster@allocor.tech>
6 * LGPL License Terms @ref lgpl_license
7 * @date 1 Dec 2019
8 */
9/*
10 * This file is part of the libopencm3 project.
11 *
12 * This library is free software: you can redistribute it and/or modify
13 * it under the terms of the GNU Lesser General Public License as published by
14 * the Free Software Foundation, either version 3 of the License, or
15 * (at your option) any later version.
16 *
17 * This library is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU Lesser General Public License for more details.
21 *
22 * You should have received a copy of the GNU Lesser General Public License
23 * along with this library. If not, see <http://www.gnu.org/licenses/>.
24 */
25#ifndef INCLUDE_LIBOPENCM3_PAC55XX_MEMORYMAP_H_
26#define INCLUDE_LIBOPENCM3_PAC55XX_MEMORYMAP_H_
27
28/**@{*/
29
30/** @defgroup address_memory Address Memory Map.
31@{*/
32#define FLASH_BASE (0x00000000UL)
33#define INFO1_FLASH_BASE (0x00100000UL)
34#define INFO2_FLASH_BASE (0x00100400UL)
35#define INFO3_FLASH_BASE (0x00100800UL)
36#define SRAM_BASE (0x20000000UL)
37#define PERIPH_BASE (0x40000000UL)
38/**@}*/
39/** @defgroup peripheral_addresses Core Peripheral Memory Map.
40@{*/
41#define ADC_BASE (PERIPH_BASE + 0x00000)
42#define I2C_BASE (PERIPH_BASE + 0x10000)
43#define USARTA_BASE (PERIPH_BASE + 0x20000)
44#define USARTB_BASE (PERIPH_BASE + 0x30000)
45#define USARTC_BASE (PERIPH_BASE + 0x40000)
46#define USARTD_BASE (PERIPH_BASE + 0x50000)
47#define TIMERA_BASE (PERIPH_BASE + 0x60000)
48#define TIMERB_BASE (PERIPH_BASE + 0x70000)
49#define TIMERC_BASE (PERIPH_BASE + 0x80000)
50#define TIMERD_BASE (PERIPH_BASE + 0x90000)
51#define CAN_BASE (PERIPH_BASE + 0xA0000)
52#define GPTIMERA_BASE (PERIPH_BASE + 0xB0000)
53#define GPTIMERB_BASE (PERIPH_BASE + 0xC0000)
54#define SYS_PERIPH_BASE (PERIPH_BASE + 0xD0000)
55/**@}*/
56/** @defgroup system_peripheral_addresses System Peripheral Memory Map.
57@{*/
58#define MEMCTL_BASE (SYS_PERIPH_BASE + 0x0000)
59#define SCC_BASE (SYS_PERIPH_BASE + 0x0400)
60#define WWDT_BASE (SYS_PERIPH_BASE + 0x0800)
61#define RTC_BASE (SYS_PERIPH_BASE + 0x0C00)
62#define CRC_BASE (SYS_PERIPH_BASE + 0x1000)
63#define GPIOA_BASE (SYS_PERIPH_BASE + 0x1400)
64#define GPIOB_BASE (SYS_PERIPH_BASE + 0x1800)
65#define GPIOC_BASE (SYS_PERIPH_BASE + 0x1C00)
66#define GPIOD_BASE (SYS_PERIPH_BASE + 0x2000)
67#define GPIOE_BASE (SYS_PERIPH_BASE + 0x2400)
68#define GPIOF_BASE (SYS_PERIPH_BASE + 0x2800)
69#define GPIOG_BASE (SYS_PERIPH_BASE + 0x2C00)
70/**@}*/
71/**@}*/
72
73#endif /* INCLUDE_LIBOPENCM3_PAC55XX_MEMORYMAP_H_ */