libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
3a/pmc.h
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1/*
2 * This file is part of the libopencm3 project.
3 *
4 * Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
5 * Copyright (C) 2015 Felix Held <felix-libopencm3@felixheld.de>
6 *
7 * This library is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU Lesser General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public License
18 * along with this library. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#ifndef LIBOPENCM3_PMC_H
22#define LIBOPENCM3_PMC_H
23
24#include <libopencm3/sam/memorymap.h>
25#include <libopencm3/sam/common/pmc_common_all.h>
26#include <libopencm3/sam/common/pmc_common_3a3s3x.h>
27#include <libopencm3/sam/common/pmc_common_3a3u3x.h>
28
29/* --- Power Management Controller (PMC) registers ------------------------- */
30
31/* Peripheral Control Register */
32#define PMC_PCR MMIO32(PMC_BASE + 0x010C)
33
34
35/* --- Register contents --------------------------------------------------- */
36
37
38/* --- PMC Master Clock Register (PMC_MCKR) -------------------------------- */
39
40/* PLLA Divide by 2 */
41#define PMC_MCKR_PLLADIV2 (0x01 << 12)
42
43
44/* --- PMC Peripheral Control Register (PMC_PCR) --------------------------- */
45
46/* Enable */
47#define PMC_PCR_EN (0x01 << 28)
48
49/* Divisor Value */
50#define PMC_PCR_DIV_SHIFT 16
51#define PMC_PCR_DIV_MASK (0x03 << PMC_PCR_DIV_SHIFT)
52#define PMC_PCR_DIV_PERIPH_DIV_MCK (0x00 << PMC_PCR_DIV_SHIFT)
53#define PMC_PCR_DIV_PERIPH_DIV2_MCK (0x01 << PMC_PCR_DIV_SHIFT)
54#define PMC_PCR_DIV_PERIPH_DIV4_MCK (0x02 << PMC_PCR_DIV_SHIFT)
55
56/* Command */
57#define PMC_PCR_CMD (0x01 << 12)
58
59/* Peripheral ID */
60#define PMC_PCR_PID_SHIFT 0
61#define PMC_PCR_PID_MASK (0x3F << PMC_PCR_PID_SHIFT)
62
63
64#endif
pmc_common_3a3s3x.h
pmc_common_3a3u3x.h
pmc_common_all.h