libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
3s/pmc.h
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1/*
2 * This file is part of the libopencm3 project.
3 *
4 * Copyright (C) 2015 Felix Held <felix-libopencm3@felixheld.de>
5 *
6 * This library is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU Lesser General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public License
17 * along with this library. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef LIBOPENCM3_PMC_H
21#define LIBOPENCM3_PMC_H
22
23#include <libopencm3/sam/memorymap.h>
24#include <libopencm3/sam/common/pmc_common_all.h>
25#include <libopencm3/sam/common/pmc_common_3a3s3x.h>
26
27/* --- Power Management Controller (PMC) registers ----------------------- */
28
29/* PLLB Register */
30#define CKGR_PLLBR MMIO32(PMC_BASE + 0x002C)
31
32/* Oscillator Calibration Register */
33#define PMC_OCR MMIO32(PMC_BASE + 0x0110)
34
35
36/* --- Register contents --------------------------------------------------- */
37
38
39/* --- PMC Clock Generator Main Clock Frequency Register (CKGR_MCFR) ------- */
40
41/* RC Oscillator Frequency Measure (write-only, only on atsam3s8) */
42#define CKGR_MCFR_RCMEAS (0x01 << 20)
43
44
45/* --- PMC Clock Generator PLLB Register (CKGR_PLLBR) ---------------------- */
46
47/* PLLB Multiplier */
48#define CKGR_PLLBR_MULB_SHIFT 16
49#define CKGR_PLLBR_MULB_MASK (0x7FF << CKGR_PLLBR_MULB_SHIFT)
50
51/* PLLA Counter */
52#define CKGR_PLLBR_PLLBCOUNT_SHIFT 8
53#define CKGR_PLLBR_PLLBCOUNT_MASK (0x3F << CKGR_PLLBR_PLLBCOUNT_SHIFT)
54
55/* Divider */
56#define CKGR_PLLBR_DIVB_SHIFT 0
57#define CKGR_PLLBR_DIVB_MASK (0xFF << CKGR_PLLBR_DIVB_SHIFT)
58
59
60/* --- PMC Master Clock Register (PMC_MCKR) -------------------------------- */
61
62/* PLLB Divide by 2 */
63#define PMC_MCKR_PLLBDIV2 (0x01 << 13)
64
65/* PLLA Divide by 2 */
66#define PMC_MCKR_PLLADIV2 (0x01 << 12)
67
68/* Master Clock Source Selection */
69#define PMC_MCKR_CSS_PLLB_CLK (3 << PMC_MCKR_CSS_SHIFT)
70
71
72/* --- PMC Programmable Clock Register 0 (PMC_PCK0) ------------------------ */
73
74/* Master Clock Source Selection */
75#define PMC_PCK0_CSS_PLLB_CLK (3 << PMC_PCK0_CSS_SHIFT)
76
77
78/* --- PMC Programmable Clock Register 1 (PMC_PCK1) ------------------------ */
79
80/* Master Clock Source Selection */
81#define PMC_PCK1_CSS_PLLB_CLK (3 << PMC_PCK1_CSS_SHIFT)
82
83
84/* --- PMC Programmable Clock Register 2 (PMC_PCK2) ------------------------ */
85
86/* Master Clock Source Selection */
87#define PMC_PCK2_CSS_PLLB_CLK (3 << PMC_PCK2_CSS_SHIFT)
88
89
90/* --- PMC Interrupt Enable Register (PMC_IER) ----------------------------- */
91
92/* PLLB Lock Interrupt Enable */
93#define PMC_IER_LOCKB (0x01 << 2)
94
95
96/* --- PMC Interrupt Disable Register (PMC_IDR) ---------------------------- */
97
98/* PLLB Lock Interrupt Disable */
99#define PMC_IDR_LOCKB (0x01 << 2)
100
101
102/* --- PMC Status Register (PMC_SR) ---------------------------------------- */
103
104/* PLLB Lock Status */
105#define PMC_SR_LOCKB (0x01 << 2)
106
107
108/* --- PMC Interrupt Mask Register (PMC_IDR) ------------------------------- */
109
110/* PLLB Lock Interrupt Mask */
111#define PMC_IMR_LOCKB (0x01 << 2)
112
113
114/* --- PMC Oscillator Calibration Register (PMC_OCR) ----------------------- */
115
116/* Selection of RC Oscillator Calibration bits for 12 Mhz */
117#define PMC_OCR_SEL12 (0x01 << 23)
118
119/* RC Oscillator Calibration bits for 12 Mhz */
120#define PMC_OCR_CAL12_SHIFT 16
121#define PMC_OCR_CAL12_MASK (0x7F << PMC_OCR_CAL12_SHIFT)
122
123/* Selection of RC Oscillator Calibration bits for 8 Mhz */
124#define PMC_OCR_SEL8 (0x01 << 15)
125
126/* RC Oscillator Calibration bits for 8 Mhz */
127#define PMC_OCR_CAL8_SHIFT 8
128#define PMC_OCR_CAL8_MASK (0x7F << PMC_OCR_CAL8_SHIFT)
129
130/* Selection of RC Oscillator Calibration bits for 4 Mhz */
131#define PMC_OCR_SEL4 (0x01 << 7)
132
133/* RC Oscillator Calibration bits for 4 Mhz */
134#define PMC_OCR_CAL4_SHIFT 0
135#define PMC_OCR_CAL4_MASK (0x7F << PMC_OCR_CAL12_SHIFT)
136
137
138#endif
pmc_common_3a3s3x.h
pmc_common_all.h