libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
f3/opamp.h
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1/** @defgroup opamp_defines OPAMP Defines
2 *
3 * @brief <b>libopencm3 Defined Constants and Types for the STM32F3xx
4 * Operational Amplifier module</b>
5 *
6 * @ingroup STM32F3xx_defines
7 *
8 * @version 1.0.0
9 *
10 * @date 22 May 2020
11 *
12 *LGPL License Terms @ref lgpl_license
13 */
14/*
15 * This file is part of the libopencm3 project.
16 *
17 * This library is free software: you can redistribute it and/or modify
18 * it under the terms of the GNU Lesser General Public License as published by
19 * the Free Software Foundation, either version 3 of the License, or
20 * (at your option) any later version.
21 *
22 * This library is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU Lesser General Public License for more details.
26 *
27 * You should have received a copy of the GNU Lesser General Public License
28 * along with this library. If not, see <http://www.gnu.org/licenses/>.
29 */
30
31#ifndef LIBOPENCM3_OPAMP_H
32#define LIBOPENCM3_OPAMP_H
33/**@{*/
34
35#include <libopencm3/stm32/common/opamp_common_v1.h>
36
37#define OPAMP1 (OPAMP_BASE + 0x38)
38#define OPAMP2 (OPAMP_BASE + 0x3C)
39#define OPAMP3 (OPAMP_BASE + 0x40)
40#define OPAMP4 (OPAMP_BASE + 0x44)
41
42/* OpAmp registers */
43
44/* Control and status register (OPAMPx_CSR) */
45#define OPAMP1_CSR OPAMP_CSR(OPAMP1)
46#define OPAMP2_CSR OPAMP_CSR(OPAMP2)
47#define OPAMP3_CSR OPAMP_CSR(OPAMP3)
48#define OPAMP4_CSR OPAMP_CSR(OPAMP4)
49
50/* OPAMPx_CSR values */
51
52#define OPAMP1_CSR_VPS_SEL_PA7 (0x0)
53#define OPAMP1_CSR_VPS_SEL_PA5 (0x1)
54#define OPAMP1_CSR_VPS_SEL_PA3 (0x2)
55#define OPAMP1_CSR_VPS_SEL_PA1 (0x3)
56#define OPAMP2_CSR_VPS_SEL_PD14 (0x0)
57#define OPAMP2_CSR_VPS_SEL_PB14 (0x1)
58#define OPAMP2_CSR_VPS_SEL_PB0 (0x2)
59#define OPAMP2_CSR_VPS_SEL_PA7 (0x3)
60#define OPAMP3_CSR_VPS_SEL_PB13 (0x0)
61#define OPAMP3_CSR_VPS_SEL_PA5 (0x1)
62#define OPAMP3_CSR_VPS_SEL_PA1 (0x2)
63#define OPAMP3_CSR_VPS_SEL_PB0 (0x3)
64#define OPAMP4_CSR_VPS_SEL_PD11 (0x0)
65#define OPAMP4_CSR_VPS_SEL_PB11 (0x1)
66#define OPAMP4_CSR_VPS_SEL_PA4 (0x2)
67#define OPAMP4_CSR_VPS_SEL_PB13 (0x3)
68
69#define OPAMP1_CSR_VMS_SEL_PC5 (0x0)
70#define OPAMP1_CSR_VMS_SEL_PA3 (0x1)
71#define OPAMP2_CSR_VMS_SEL_PC5 (0x0)
72#define OPAMP2_CSR_VMS_SEL_PA5 (0x1)
73#define OPAMP3_CSR_VMS_SEL_PB10 (0x0)
74#define OPAMP3_CSR_VMS_SEL_PB2 (0x1)
75#define OPAMP4_CSR_VMS_SEL_PB10 (0x0)
76#define OPAMP4_CSR_VMS_SEL_PD8 (0x1)
77
78#define OPAMP1_CSR_VM_SEL_PC5 (0x0)
79#define OPAMP1_CSR_VM_SEL_PA3 (0x1)
80#define OPAMP2_CSR_VM_SEL_PC5 (0x0)
81#define OPAMP2_CSR_VM_SEL_PA5 (0x1)
82#define OPAMP3_CSR_VM_SEL_PB10 (0x0)
83#define OPAMP3_CSR_VM_SEL_PB2 (0x1)
84#define OPAMP4_CSR_VM_SEL_PB10 (0x0)
85#define OPAMP4_CSR_VM_SEL_PD8 (0x1)
86
87#define OPAMP1_CSR_VP_SEL_PA7 (0x0)
88#define OPAMP1_CSR_VP_SEL_PA5 (0x1)
89#define OPAMP1_CSR_VP_SEL_PA3 (0x2)
90#define OPAMP1_CSR_VP_SEL_PA1 (0x3)
91#define OPAMP2_CSR_VP_SEL_PD14 (0x0)
92#define OPAMP2_CSR_VP_SEL_PB14 (0x1)
93#define OPAMP2_CSR_VP_SEL_PB0 (0x2)
94#define OPAMP2_CSR_VP_SEL_PA7 (0x3)
95#define OPAMP3_CSR_VP_SEL_PB13 (0x0)
96#define OPAMP3_CSR_VP_SEL_PA5 (0x1)
97#define OPAMP3_CSR_VP_SEL_PA1 (0x2)
98#define OPAMP3_CSR_VP_SEL_PB0 (0x3)
99#define OPAMP4_CSR_VP_SEL_PD11 (0x0)
100#define OPAMP4_CSR_VP_SEL_PB11 (0x1)
101#define OPAMP4_CSR_VP_SEL_PA4 (0x2)
102#define OPAMP4_CSR_VP_SEL_PB13 (0x3)
103
104/**@}*/
105#endif
opamp_common_v1.h