libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
dac_common_v1.h
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1/** @addtogroup dac_defines
2
3@author @htmlonly © @endhtmlonly 2020
4Ben Brewer <ben.brewer@codethink.co.uk>
5
6*/
7
8/*
9 * This file is part of the libopencm3 project.
10 *
11 * Copyright (C) 2020 Ben Brewer <ben.brewer@codethink.co.uk>
12 *
13 * This library is free software: you can redistribute it and/or modify
14 * it under the terms of the GNU Lesser General Public License as published by
15 * the Free Software Foundation, either version 3 of the License, or
16 * (at your option) any later version.
17 *
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU Lesser General Public License for more details.
22 *
23 * You should have received a copy of the GNU Lesser General Public License
24 * along with this library. If not, see <http://www.gnu.org/licenses/>.
25 */
26
27/**@{*/
28
29/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA DAC.H
30The order of header inclusion is important. dac.h includes the device
31specific memorymap.h header before including this header file.*/
32
33/** @cond */
34#ifdef LIBOPENCM3_DAC_H
35/** @endcond */
36#ifndef LIBOPENCM3_DAC_COMMON_V1_H
37#define LIBOPENCM3_DAC_COMMON_V1_H
38
40
41/**@addtogroup dac_cr_values
42 * @{
43 */
44
45/** TSEL2[2:0]: DAC channel2 trigger selection */
46#define DAC_CR_TSEL2_SHIFT 19
47/** @defgroup dac_trig2_sel DAC Channel 2 Trigger Source Selection
48@ingroup dac_defines
49
50@li T6: Timer 6 TRGO event
51@li T3: Timer 3 TRGO event
52@li T8: Timer 8 TRGO event
53@li T7: Timer 7 TRGO event
54@li T5: Timer 5 TRGO event
55@li T15: Timer 15 TRGO event
56@li T2: Timer 2 TRGO event
57@li T4: Timer 4 TRGO event
58@li E9: External line9
59@li SW: Software trigger
60
61@note: Refer to the timer documentation for details of the TRGO event.
62@note: T3 replaced by T8 and T5 replaced by T15 in some devices.
63@note: this is <b>not</b> valid for the STM32L1 family.
64@note: only used if bit TEN2 is set (DAC channel 2 trigger enabled)
65@{*/
66#define DAC_CR_TSEL2_T6 (0x0 << DAC_CR_TSEL2_SHIFT)
67#define DAC_CR_TSEL2_T3 (0x1 << DAC_CR_TSEL2_SHIFT)
68#define DAC_CR_TSEL2_T8 (0x1 << DAC_CR_TSEL2_SHIFT)
69#define DAC_CR_TSEL2_T7 (0x2 << DAC_CR_TSEL2_SHIFT)
70#define DAC_CR_TSEL2_T5 (0x3 << DAC_CR_TSEL2_SHIFT)
71#define DAC_CR_TSEL2_T15 (0x3 << DAC_CR_TSEL2_SHIFT)
72#define DAC_CR_TSEL2_T2 (0x4 << DAC_CR_TSEL2_SHIFT)
73#define DAC_CR_TSEL2_T4 (0x5 << DAC_CR_TSEL2_SHIFT)
74#define DAC_CR_TSEL2_E9 (0x6 << DAC_CR_TSEL2_SHIFT)
75#define DAC_CR_TSEL2_SW (0x7 << DAC_CR_TSEL2_SHIFT)
76/**@}*/
77
78/* TEN2: DAC channel2 trigger enable */
79#define DAC_CR_TEN2 (1 << 18)
80
81/* BOFF2: DAC channel2 output buffer disable */
82#define DAC_CR_BOFF2 (1 << 17)
83
84/* TSEL1[2:0]: DAC channel1 trigger selection */
85#define DAC_CR_TSEL1_SHIFT 3
86/** @defgroup dac_trig1_sel DAC Channel 1 Trigger Source Selection
87@ingroup dac_defines
88
89@li T6: Timer 6 TRGO event
90@li T3: Timer 3 TRGO event
91@li T8: Timer 8 TRGO event
92@li T7: Timer 7 TRGO event
93@li T5: Timer 5 TRGO event
94@li T15: Timer 15 TRGO event
95@li T2: Timer 2 TRGO event
96@li T4: Timer 4 TRGO event
97@li E9: External line 9
98@li SW: Software trigger
99
100@note: Refer to the timer documentation for details of the TRGO event.
101@note: T3 replaced by T8 and T5 replaced by T15 in some devices.
102@note: this is <b>not</b> valid for the STM32L1 family.
103@note: only used if bit TEN1 is set (DAC channel 1 trigger enabled).
104@{*/
105#define DAC_CR_TSEL1_T6 (0x0 << DAC_CR_TSEL1_SHIFT)
106#define DAC_CR_TSEL1_T3 (0x1 << DAC_CR_TSEL1_SHIFT)
107#define DAC_CR_TSEL1_T8 (0x1 << DAC_CR_TSEL1_SHIFT)
108#define DAC_CR_TSEL1_T7 (0x2 << DAC_CR_TSEL1_SHIFT)
109#define DAC_CR_TSEL1_T5 (0x3 << DAC_CR_TSEL1_SHIFT)
110#define DAC_CR_TSEL1_T15 (0x3 << DAC_CR_TSEL1_SHIFT)
111#define DAC_CR_TSEL1_T2 (0x4 << DAC_CR_TSEL1_SHIFT)
112#define DAC_CR_TSEL1_T4 (0x5 << DAC_CR_TSEL1_SHIFT)
113#define DAC_CR_TSEL1_E9 (0x6 << DAC_CR_TSEL1_SHIFT)
114#define DAC_CR_TSEL1_SW (0x7 << DAC_CR_TSEL1_SHIFT)
115/**@}*/
116
117/* TEN1: DAC channel1 trigger enable */
118#define DAC_CR_TEN1 (1 << 2)
119
120/* BOFF1: DAC channel1 output buffer disable */
121#define DAC_CR_BOFF1 (1 << 1)
122
123/**@}*/
124
125/* --- Function prototypes ------------------------------------------------- */
126
128
130
131#endif
132/** @cond */
133#else
134#warning "dac_common_v1.h should not be included explicitly, only via dac.h"
135#endif
136/** @endcond */
137
138/**@}*/
139
#define END_DECLS
Definition: common.h:34
#define BEGIN_DECLS
Definition: common.h:33