libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
stm32/l0/vector_nvic.c
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1/* This file is part of the libopencm3 project.
2 *
3 * It was generated by the irq2nvic_h script.
4 *
5 * This part needs to get included in the compilation unit where
6 * blocking_handler gets defined due to the way #pragma works.
7 */
8
9
10/** @defgroup CM3_nvic_isrdecls_STM32L0 User interrupt service routines (ISR) defaults for STM32 L0 series
11 @ingroup CM3_nvic_isrdecls
12
13 @{*/
14
15void wwdg_isr(void) __attribute__((weak, alias("blocking_handler")));
16void pvd_isr(void) __attribute__((weak, alias("blocking_handler")));
17void rtc_isr(void) __attribute__((weak, alias("blocking_handler")));
18void flash_isr(void) __attribute__((weak, alias("blocking_handler")));
19void rcc_isr(void) __attribute__((weak, alias("blocking_handler")));
20void exti0_1_isr(void) __attribute__((weak, alias("blocking_handler")));
21void exti2_3_isr(void) __attribute__((weak, alias("blocking_handler")));
22void exti4_15_isr(void) __attribute__((weak, alias("blocking_handler")));
23void tsc_isr(void) __attribute__((weak, alias("blocking_handler")));
24void dma1_channel1_isr(void) __attribute__((weak, alias("blocking_handler")));
25void dma1_channel2_3_isr(void) __attribute__((weak, alias("blocking_handler")));
26void dma1_channel4_5_isr(void) __attribute__((weak, alias("blocking_handler")));
27void adc_comp_isr(void) __attribute__((weak, alias("blocking_handler")));
28void lptim1_isr(void) __attribute__((weak, alias("blocking_handler")));
29void usart4_5_isr(void) __attribute__((weak, alias("blocking_handler")));
30void tim2_isr(void) __attribute__((weak, alias("blocking_handler")));
31void tim3_isr(void) __attribute__((weak, alias("blocking_handler")));
32void tim6_dac_isr(void) __attribute__((weak, alias("blocking_handler")));
33void tim7_isr(void) __attribute__((weak, alias("blocking_handler")));
34void reserved4_isr(void) __attribute__((weak, alias("blocking_handler")));
35void tim21_isr(void) __attribute__((weak, alias("blocking_handler")));
36void i2c3_isr(void) __attribute__((weak, alias("blocking_handler")));
37void tim22_isr(void) __attribute__((weak, alias("blocking_handler")));
38void i2c1_isr(void) __attribute__((weak, alias("blocking_handler")));
39void i2c2_isr(void) __attribute__((weak, alias("blocking_handler")));
40void spi1_isr(void) __attribute__((weak, alias("blocking_handler")));
41void spi2_isr(void) __attribute__((weak, alias("blocking_handler")));
42void usart1_isr(void) __attribute__((weak, alias("blocking_handler")));
43void usart2_isr(void) __attribute__((weak, alias("blocking_handler")));
44void lpuart1_aes_rng_isr(void) __attribute__((weak, alias("blocking_handler")));
45void lcd_isr(void) __attribute__((weak, alias("blocking_handler")));
46void usb_isr(void) __attribute__((weak, alias("blocking_handler")));
47
48/**@}*/
49
50/* Initialization template for the interrupt vector table. This definition is
51 * used by the startup code generator (vector.c) to set the initial values for
52 * the interrupt handling routines to the chip family specific _isr weak
53 * symbols. */
54
55#define IRQ_HANDLERS \
56 [NVIC_WWDG_IRQ] = wwdg_isr, \
57 [NVIC_PVD_IRQ] = pvd_isr, \
58 [NVIC_RTC_IRQ] = rtc_isr, \
59 [NVIC_FLASH_IRQ] = flash_isr, \
60 [NVIC_RCC_IRQ] = rcc_isr, \
61 [NVIC_EXTI0_1_IRQ] = exti0_1_isr, \
62 [NVIC_EXTI2_3_IRQ] = exti2_3_isr, \
63 [NVIC_EXTI4_15_IRQ] = exti4_15_isr, \
64 [NVIC_TSC_IRQ] = tsc_isr, \
65 [NVIC_DMA1_CHANNEL1_IRQ] = dma1_channel1_isr, \
66 [NVIC_DMA1_CHANNEL2_3_IRQ] = dma1_channel2_3_isr, \
67 [NVIC_DMA1_CHANNEL4_5_IRQ] = dma1_channel4_5_isr, \
68 [NVIC_ADC_COMP_IRQ] = adc_comp_isr, \
69 [NVIC_LPTIM1_IRQ] = lptim1_isr, \
70 [NVIC_USART4_5_IRQ] = usart4_5_isr, \
71 [NVIC_TIM2_IRQ] = tim2_isr, \
72 [NVIC_TIM3_IRQ] = tim3_isr, \
73 [NVIC_TIM6_DAC_IRQ] = tim6_dac_isr, \
74 [NVIC_TIM7_IRQ] = tim7_isr, \
75 [NVIC_RESERVED4_IRQ] = reserved4_isr, \
76 [NVIC_TIM21_IRQ] = tim21_isr, \
77 [NVIC_I2C3_IRQ] = i2c3_isr, \
78 [NVIC_TIM22_IRQ] = tim22_isr, \
79 [NVIC_I2C1_IRQ] = i2c1_isr, \
80 [NVIC_I2C2_IRQ] = i2c2_isr, \
81 [NVIC_SPI1_IRQ] = spi1_isr, \
82 [NVIC_SPI2_IRQ] = spi2_isr, \
83 [NVIC_USART1_IRQ] = usart1_isr, \
84 [NVIC_USART2_IRQ] = usart2_isr, \
85 [NVIC_LPUART1_AES_RNG_IRQ] = lpuart1_aes_rng_isr, \
86 [NVIC_LCD_IRQ] = lcd_isr, \
87 [NVIC_USB_IRQ] = usb_isr
void tsc_isr(void)
void lptim1_isr(void)
void tim21_isr(void)
void usart4_5_isr(void)
void tim2_isr(void)
void i2c3_isr(void)
void exti4_15_isr(void)
void rcc_isr(void)
void usart2_isr(void)
void wwdg_isr(void)
void tim6_dac_isr(void)
void flash_isr(void)
void i2c1_isr(void)
void i2c2_isr(void)
void pvd_isr(void)
void usart1_isr(void)
void reserved4_isr(void)
void dma1_channel1_isr(void)
void dma1_channel2_3_isr(void)
void lcd_isr(void)
void usb_isr(void)
void dma1_channel4_5_isr(void)
void spi2_isr(void)
void rtc_isr(void)
void tim3_isr(void)
void exti2_3_isr(void)
void adc_comp_isr(void)
void tim22_isr(void)
void exti0_1_isr(void)
void lpuart1_aes_rng_isr(void)
void spi1_isr(void)
void tim7_isr(void)