libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
stm32/l4/vector_nvic.c
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1/* This file is part of the libopencm3 project.
2 *
3 * It was generated by the irq2nvic_h script.
4 *
5 * This part needs to get included in the compilation unit where
6 * blocking_handler gets defined due to the way #pragma works.
7 */
8
9
10/** @defgroup CM3_nvic_isrdecls_STM32L4 User interrupt service routines (ISR) defaults for STM32 L4 series
11 @ingroup CM3_nvic_isrdecls
12
13 @{*/
14
15void wwdg_isr(void) __attribute__((weak, alias("blocking_handler")));
16void pvd_pvm_isr(void) __attribute__((weak, alias("blocking_handler")));
17void tamp_stamp_isr(void) __attribute__((weak, alias("blocking_handler")));
18void rtc_wkup_isr(void) __attribute__((weak, alias("blocking_handler")));
19void flash_isr(void) __attribute__((weak, alias("blocking_handler")));
20void rcc_isr(void) __attribute__((weak, alias("blocking_handler")));
21void exti0_isr(void) __attribute__((weak, alias("blocking_handler")));
22void exti1_isr(void) __attribute__((weak, alias("blocking_handler")));
23void exti2_isr(void) __attribute__((weak, alias("blocking_handler")));
24void exti3_isr(void) __attribute__((weak, alias("blocking_handler")));
25void exti4_isr(void) __attribute__((weak, alias("blocking_handler")));
26void dma1_channel1_isr(void) __attribute__((weak, alias("blocking_handler")));
27void dma1_channel2_isr(void) __attribute__((weak, alias("blocking_handler")));
28void dma1_channel3_isr(void) __attribute__((weak, alias("blocking_handler")));
29void dma1_channel4_isr(void) __attribute__((weak, alias("blocking_handler")));
30void dma1_channel5_isr(void) __attribute__((weak, alias("blocking_handler")));
31void dma1_channel6_isr(void) __attribute__((weak, alias("blocking_handler")));
32void dma1_channel7_isr(void) __attribute__((weak, alias("blocking_handler")));
33void adc1_2_isr(void) __attribute__((weak, alias("blocking_handler")));
34void can1_tx_isr(void) __attribute__((weak, alias("blocking_handler")));
35void can1_rx0_isr(void) __attribute__((weak, alias("blocking_handler")));
36void can1_rx1_isr(void) __attribute__((weak, alias("blocking_handler")));
37void can1_sce_isr(void) __attribute__((weak, alias("blocking_handler")));
38void exti9_5_isr(void) __attribute__((weak, alias("blocking_handler")));
39void tim1_brk_tim15_isr(void) __attribute__((weak, alias("blocking_handler")));
40void tim1_up_tim16_isr(void) __attribute__((weak, alias("blocking_handler")));
41void tim1_trg_com_tim17_isr(void) __attribute__((weak, alias("blocking_handler")));
42void tim1_cc_isr(void) __attribute__((weak, alias("blocking_handler")));
43void tim2_isr(void) __attribute__((weak, alias("blocking_handler")));
44void tim3_isr(void) __attribute__((weak, alias("blocking_handler")));
45void tim4_isr(void) __attribute__((weak, alias("blocking_handler")));
46void i2c1_ev_isr(void) __attribute__((weak, alias("blocking_handler")));
47void i2c1_er_isr(void) __attribute__((weak, alias("blocking_handler")));
48void i2c2_ev_isr(void) __attribute__((weak, alias("blocking_handler")));
49void i2c2_er_isr(void) __attribute__((weak, alias("blocking_handler")));
50void spi1_isr(void) __attribute__((weak, alias("blocking_handler")));
51void spi2_isr(void) __attribute__((weak, alias("blocking_handler")));
52void usart1_isr(void) __attribute__((weak, alias("blocking_handler")));
53void usart2_isr(void) __attribute__((weak, alias("blocking_handler")));
54void usart3_isr(void) __attribute__((weak, alias("blocking_handler")));
55void exti15_10_isr(void) __attribute__((weak, alias("blocking_handler")));
56void rtc_alarm_isr(void) __attribute__((weak, alias("blocking_handler")));
57void dfsdm3_isr(void) __attribute__((weak, alias("blocking_handler")));
58void tim8_brk_isr(void) __attribute__((weak, alias("blocking_handler")));
59void tim8_up_isr(void) __attribute__((weak, alias("blocking_handler")));
60void tim8_trg_com_isr(void) __attribute__((weak, alias("blocking_handler")));
61void tim8_cc_isr(void) __attribute__((weak, alias("blocking_handler")));
62void adc3_isr(void) __attribute__((weak, alias("blocking_handler")));
63void fmc_isr(void) __attribute__((weak, alias("blocking_handler")));
64void sdmmc1_isr(void) __attribute__((weak, alias("blocking_handler")));
65void tim5_isr(void) __attribute__((weak, alias("blocking_handler")));
66void spi3_isr(void) __attribute__((weak, alias("blocking_handler")));
67void uart4_isr(void) __attribute__((weak, alias("blocking_handler")));
68void uart5_isr(void) __attribute__((weak, alias("blocking_handler")));
69void tim6_dacunder_isr(void) __attribute__((weak, alias("blocking_handler")));
70void tim7_isr(void) __attribute__((weak, alias("blocking_handler")));
71void dma2_channel1_isr(void) __attribute__((weak, alias("blocking_handler")));
72void dma2_channel2_isr(void) __attribute__((weak, alias("blocking_handler")));
73void dma2_channel3_isr(void) __attribute__((weak, alias("blocking_handler")));
74void dma2_channel4_isr(void) __attribute__((weak, alias("blocking_handler")));
75void dma2_channel5_isr(void) __attribute__((weak, alias("blocking_handler")));
76void dfsdm0_isr(void) __attribute__((weak, alias("blocking_handler")));
77void dfsdm1_isr(void) __attribute__((weak, alias("blocking_handler")));
78void dfsdm2_isr(void) __attribute__((weak, alias("blocking_handler")));
79void comp_isr(void) __attribute__((weak, alias("blocking_handler")));
80void lptim1_isr(void) __attribute__((weak, alias("blocking_handler")));
81void lptim2_isr(void) __attribute__((weak, alias("blocking_handler")));
82void otg_fs_isr(void) __attribute__((weak, alias("blocking_handler")));
83void dma2_channel6_isr(void) __attribute__((weak, alias("blocking_handler")));
84void dma2_channel7_isr(void) __attribute__((weak, alias("blocking_handler")));
85void lpuart1_isr(void) __attribute__((weak, alias("blocking_handler")));
86void quadspi_isr(void) __attribute__((weak, alias("blocking_handler")));
87void i2c3_ev_isr(void) __attribute__((weak, alias("blocking_handler")));
88void i2c3_er_isr(void) __attribute__((weak, alias("blocking_handler")));
89void sai1_isr(void) __attribute__((weak, alias("blocking_handler")));
90void sai2_isr(void) __attribute__((weak, alias("blocking_handler")));
91void swpmi1_isr(void) __attribute__((weak, alias("blocking_handler")));
92void tsc_isr(void) __attribute__((weak, alias("blocking_handler")));
93void lcd_isr(void) __attribute__((weak, alias("blocking_handler")));
94void aes_isr(void) __attribute__((weak, alias("blocking_handler")));
95void rng_isr(void) __attribute__((weak, alias("blocking_handler")));
96void fpu_isr(void) __attribute__((weak, alias("blocking_handler")));
97void hash_crs_isr(void) __attribute__((weak, alias("blocking_handler")));
98void i2c4_ev_isr(void) __attribute__((weak, alias("blocking_handler")));
99void i2c4_er_isr(void) __attribute__((weak, alias("blocking_handler")));
100void dcmi_isr(void) __attribute__((weak, alias("blocking_handler")));
101void can2_tx_isr(void) __attribute__((weak, alias("blocking_handler")));
102void can2_rx0_isr(void) __attribute__((weak, alias("blocking_handler")));
103void can2_rx1_isr(void) __attribute__((weak, alias("blocking_handler")));
104void can2_sce_isr(void) __attribute__((weak, alias("blocking_handler")));
105void dma2d_isr(void) __attribute__((weak, alias("blocking_handler")));
106
107/**@}*/
108
109/* Initialization template for the interrupt vector table. This definition is
110 * used by the startup code generator (vector.c) to set the initial values for
111 * the interrupt handling routines to the chip family specific _isr weak
112 * symbols. */
113
114#define IRQ_HANDLERS \
115 [NVIC_WWDG_IRQ] = wwdg_isr, \
116 [NVIC_PVD_PVM_IRQ] = pvd_pvm_isr, \
117 [NVIC_TAMP_STAMP_IRQ] = tamp_stamp_isr, \
118 [NVIC_RTC_WKUP_IRQ] = rtc_wkup_isr, \
119 [NVIC_FLASH_IRQ] = flash_isr, \
120 [NVIC_RCC_IRQ] = rcc_isr, \
121 [NVIC_EXTI0_IRQ] = exti0_isr, \
122 [NVIC_EXTI1_IRQ] = exti1_isr, \
123 [NVIC_EXTI2_IRQ] = exti2_isr, \
124 [NVIC_EXTI3_IRQ] = exti3_isr, \
125 [NVIC_EXTI4_IRQ] = exti4_isr, \
126 [NVIC_DMA1_CHANNEL1_IRQ] = dma1_channel1_isr, \
127 [NVIC_DMA1_CHANNEL2_IRQ] = dma1_channel2_isr, \
128 [NVIC_DMA1_CHANNEL3_IRQ] = dma1_channel3_isr, \
129 [NVIC_DMA1_CHANNEL4_IRQ] = dma1_channel4_isr, \
130 [NVIC_DMA1_CHANNEL5_IRQ] = dma1_channel5_isr, \
131 [NVIC_DMA1_CHANNEL6_IRQ] = dma1_channel6_isr, \
132 [NVIC_DMA1_CHANNEL7_IRQ] = dma1_channel7_isr, \
133 [NVIC_ADC1_2_IRQ] = adc1_2_isr, \
134 [NVIC_CAN1_TX_IRQ] = can1_tx_isr, \
135 [NVIC_CAN1_RX0_IRQ] = can1_rx0_isr, \
136 [NVIC_CAN1_RX1_IRQ] = can1_rx1_isr, \
137 [NVIC_CAN1_SCE_IRQ] = can1_sce_isr, \
138 [NVIC_EXTI9_5_IRQ] = exti9_5_isr, \
139 [NVIC_TIM1_BRK_TIM15_IRQ] = tim1_brk_tim15_isr, \
140 [NVIC_TIM1_UP_TIM16_IRQ] = tim1_up_tim16_isr, \
141 [NVIC_TIM1_TRG_COM_TIM17_IRQ] = tim1_trg_com_tim17_isr, \
142 [NVIC_TIM1_CC_IRQ] = tim1_cc_isr, \
143 [NVIC_TIM2_IRQ] = tim2_isr, \
144 [NVIC_TIM3_IRQ] = tim3_isr, \
145 [NVIC_TIM4_IRQ] = tim4_isr, \
146 [NVIC_I2C1_EV_IRQ] = i2c1_ev_isr, \
147 [NVIC_I2C1_ER_IRQ] = i2c1_er_isr, \
148 [NVIC_I2C2_EV_IRQ] = i2c2_ev_isr, \
149 [NVIC_I2C2_ER_IRQ] = i2c2_er_isr, \
150 [NVIC_SPI1_IRQ] = spi1_isr, \
151 [NVIC_SPI2_IRQ] = spi2_isr, \
152 [NVIC_USART1_IRQ] = usart1_isr, \
153 [NVIC_USART2_IRQ] = usart2_isr, \
154 [NVIC_USART3_IRQ] = usart3_isr, \
155 [NVIC_EXTI15_10_IRQ] = exti15_10_isr, \
156 [NVIC_RTC_ALARM_IRQ] = rtc_alarm_isr, \
157 [NVIC_DFSDM3_IRQ] = dfsdm3_isr, \
158 [NVIC_TIM8_BRK_IRQ] = tim8_brk_isr, \
159 [NVIC_TIM8_UP_IRQ] = tim8_up_isr, \
160 [NVIC_TIM8_TRG_COM_IRQ] = tim8_trg_com_isr, \
161 [NVIC_TIM8_CC_IRQ] = tim8_cc_isr, \
162 [NVIC_ADC3_IRQ] = adc3_isr, \
163 [NVIC_FMC_IRQ] = fmc_isr, \
164 [NVIC_SDMMC1_IRQ] = sdmmc1_isr, \
165 [NVIC_TIM5_IRQ] = tim5_isr, \
166 [NVIC_SPI3_IRQ] = spi3_isr, \
167 [NVIC_UART4_IRQ] = uart4_isr, \
168 [NVIC_UART5_IRQ] = uart5_isr, \
169 [NVIC_TIM6_DACUNDER_IRQ] = tim6_dacunder_isr, \
170 [NVIC_TIM7_IRQ] = tim7_isr, \
171 [NVIC_DMA2_CHANNEL1_IRQ] = dma2_channel1_isr, \
172 [NVIC_DMA2_CHANNEL2_IRQ] = dma2_channel2_isr, \
173 [NVIC_DMA2_CHANNEL3_IRQ] = dma2_channel3_isr, \
174 [NVIC_DMA2_CHANNEL4_IRQ] = dma2_channel4_isr, \
175 [NVIC_DMA2_CHANNEL5_IRQ] = dma2_channel5_isr, \
176 [NVIC_DFSDM0_IRQ] = dfsdm0_isr, \
177 [NVIC_DFSDM1_IRQ] = dfsdm1_isr, \
178 [NVIC_DFSDM2_IRQ] = dfsdm2_isr, \
179 [NVIC_COMP_IRQ] = comp_isr, \
180 [NVIC_LPTIM1_IRQ] = lptim1_isr, \
181 [NVIC_LPTIM2_IRQ] = lptim2_isr, \
182 [NVIC_OTG_FS_IRQ] = otg_fs_isr, \
183 [NVIC_DMA2_CHANNEL6_IRQ] = dma2_channel6_isr, \
184 [NVIC_DMA2_CHANNEL7_IRQ] = dma2_channel7_isr, \
185 [NVIC_LPUART1_IRQ] = lpuart1_isr, \
186 [NVIC_QUADSPI_IRQ] = quadspi_isr, \
187 [NVIC_I2C3_EV_IRQ] = i2c3_ev_isr, \
188 [NVIC_I2C3_ER_IRQ] = i2c3_er_isr, \
189 [NVIC_SAI1_IRQ] = sai1_isr, \
190 [NVIC_SAI2_IRQ] = sai2_isr, \
191 [NVIC_SWPMI1_IRQ] = swpmi1_isr, \
192 [NVIC_TSC_IRQ] = tsc_isr, \
193 [NVIC_LCD_IRQ] = lcd_isr, \
194 [NVIC_AES_IRQ] = aes_isr, \
195 [NVIC_RNG_IRQ] = rng_isr, \
196 [NVIC_FPU_IRQ] = fpu_isr, \
197 [NVIC_HASH_CRS_IRQ] = hash_crs_isr, \
198 [NVIC_I2C4_EV_IRQ] = i2c4_ev_isr, \
199 [NVIC_I2C4_ER_IRQ] = i2c4_er_isr, \
200 [NVIC_DCMI_IRQ] = dcmi_isr, \
201 [NVIC_CAN2_TX_IRQ] = can2_tx_isr, \
202 [NVIC_CAN2_RX0_IRQ] = can2_rx0_isr, \
203 [NVIC_CAN2_RX1_IRQ] = can2_rx1_isr, \
204 [NVIC_CAN2_SCE_IRQ] = can2_sce_isr, \
205 [NVIC_DMA2D_IRQ] = dma2d_isr
void tim5_isr(void)
void can1_rx0_isr(void)
void lpuart1_isr(void)
void tsc_isr(void)
void lptim1_isr(void)
void i2c4_er_isr(void)
void tamp_stamp_isr(void)
void quadspi_isr(void)
void sai2_isr(void)
void dma2_channel7_isr(void)
void dcmi_isr(void)
void i2c1_ev_isr(void)
void adc1_2_isr(void)
void tim2_isr(void)
void uart5_isr(void)
void aes_isr(void)
void usart3_isr(void)
void dma2_channel1_isr(void)
void i2c1_er_isr(void)
void i2c2_er_isr(void)
void fpu_isr(void)
void exti2_isr(void)
void dfsdm2_isr(void)
void rcc_isr(void)
void i2c2_ev_isr(void)
void sdmmc1_isr(void)
void usart2_isr(void)
void wwdg_isr(void)
void tim8_up_isr(void)
void flash_isr(void)
void can2_sce_isr(void)
void can1_sce_isr(void)
void i2c3_ev_isr(void)
void uart4_isr(void)
void tim1_up_tim16_isr(void)
void dma1_channel3_isr(void)
void tim8_cc_isr(void)
void tim1_cc_isr(void)
void dma1_channel6_isr(void)
void can2_rx0_isr(void)
void dma2_channel2_isr(void)
void exti3_isr(void)
void usart1_isr(void)
void exti0_isr(void)
void tim8_trg_com_isr(void)
void can2_rx1_isr(void)
void exti15_10_isr(void)
void dma1_channel7_isr(void)
void spi3_isr(void)
void tim1_trg_com_tim17_isr(void)
void tim1_brk_tim15_isr(void)
void dma1_channel1_isr(void)
void rtc_alarm_isr(void)
void dma2_channel4_isr(void)
void lcd_isr(void)
void dfsdm3_isr(void)
void dma2_channel3_isr(void)
void can1_tx_isr(void)
void dma2d_isr(void)
void fmc_isr(void)
void spi2_isr(void)
void can2_tx_isr(void)
void pvd_pvm_isr(void)
void sai1_isr(void)
void tim3_isr(void)
void lptim2_isr(void)
void tim8_brk_isr(void)
void i2c4_ev_isr(void)
void exti9_5_isr(void)
void dma1_channel4_isr(void)
void dma1_channel2_isr(void)
void rng_isr(void)
void dma1_channel5_isr(void)
void exti1_isr(void)
void exti4_isr(void)
void tim6_dacunder_isr(void)
void dfsdm1_isr(void)
void hash_crs_isr(void)
void dfsdm0_isr(void)
void dma2_channel5_isr(void)
void comp_isr(void)
void swpmi1_isr(void)
void otg_fs_isr(void)
void can1_rx1_isr(void)
void rtc_wkup_isr(void)
void spi1_isr(void)
void tim4_isr(void)
void tim7_isr(void)
void adc3_isr(void)
void dma2_channel6_isr(void)
void i2c3_er_isr(void)