swm050/vector_nvic.c

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/* This file is part of the libopencm3 project.
 *
 * It was generated by the irq2nvic_h script.
 *
 * This part needs to get included in the compilation unit where
 * blocking_handler gets defined due to the way #pragma works.
 */
 
 
/** @defgroup CM3_nvic_isrdecls_SWM050 User interrupt service routines (ISR) defaults for SWM050 series
    @ingroup CM3_nvic_isrdecls
 
    @{*/
 
void timer_se0_isr(void) __attribute__((weak, alias("blocking_handler")));
void timer_se1_isr(void) __attribute__((weak, alias("blocking_handler")));
void wdt_isr(void) __attribute__((weak, alias("blocking_handler")));
void cp_isr(void) __attribute__((weak, alias("blocking_handler")));
void gpioa0_isr(void) __attribute__((weak, alias("blocking_handler")));
void gpioa1_isr(void) __attribute__((weak, alias("blocking_handler")));
void gpioa2_isr(void) __attribute__((weak, alias("blocking_handler")));
void gpioa3_isr(void) __attribute__((weak, alias("blocking_handler")));
void gpioa4_isr(void) __attribute__((weak, alias("blocking_handler")));
void gpioa5_isr(void) __attribute__((weak, alias("blocking_handler")));
void gpioa6_isr(void) __attribute__((weak, alias("blocking_handler")));
void gpioa7_isr(void) __attribute__((weak, alias("blocking_handler")));
void gpioa8_isr(void) __attribute__((weak, alias("blocking_handler")));
void gpioa9_isr(void) __attribute__((weak, alias("blocking_handler")));
 
/**@}*/
 
/* Initialization template for the interrupt vector table. This definition is
 * used by the startup code generator (vector.c) to set the initial values for
 * the interrupt handling routines to the chip family specific _isr weak
 * symbols. */
 
#define IRQ_HANDLERS \
    [NVIC_TIMER_SE0_IRQ] = timer_se0_isr, \
    [NVIC_TIMER_SE1_IRQ] = timer_se1_isr, \
    [NVIC_WDT_IRQ] = wdt_isr, \
    [NVIC_CP_IRQ] = cp_isr, \
    [NVIC_GPIOA0_IRQ] = gpioa0_isr, \
    [NVIC_GPIOA1_IRQ] = gpioa1_isr, \
    [NVIC_GPIOA2_IRQ] = gpioa2_isr, \
    [NVIC_GPIOA3_IRQ] = gpioa3_isr, \
    [NVIC_GPIOA4_IRQ] = gpioa4_isr, \
    [NVIC_GPIOA5_IRQ] = gpioa5_isr, \
    [NVIC_GPIOA6_IRQ] = gpioa6_isr, \
    [NVIC_GPIOA7_IRQ] = gpioa7_isr, \
    [NVIC_GPIOA8_IRQ] = gpioa8_isr, \
    [NVIC_GPIOA9_IRQ] = gpioa9_isr