libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
st_usbfs_common.h
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1/** @defgroup usb_defines USB Defines
2
3@brief <b>Defined Constants and Types for the STM32F* USB drivers</b>
4
5@ingroup STM32Fx_defines
6
7@version 1.0.0
8
9@author @htmlonly &copy; @endhtmlonly 2009
10Piotr Esden-Tempski <piotr@esden.net>
11
12@date 11 March 2013
13
14LGPL License Terms @ref lgpl_license
15 */
16/*
17 * This file is part of the libopencm3 project.
18 *
19 * Copyright (C) 2009 Piotr Esden-Tempski <piotr@esden.net>
20 *
21 * This library is free software: you can redistribute it and/or modify
22 * it under the terms of the GNU Lesser General Public License as published by
23 * the Free Software Foundation, either version 3 of the License, or
24 * (at your option) any later version.
25 *
26 * This library is distributed in the hope that it will be useful,
27 * but WITHOUT ANY WARRANTY; without even the implied warranty of
28 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
29 * GNU Lesser General Public License for more details.
30 *
31 * You should have received a copy of the GNU Lesser General Public License
32 * along with this library. If not, see <http://www.gnu.org/licenses/>.
33 */
34
35/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY !
36 * Use top-level <libopencm3/stm32/st_usbfs.h>
37 */
38
39/**@{*/
40
41/** @cond */
42#ifdef LIBOPENCM3_ST_USBFS_H
43/** @endcond */
44#ifndef LIBOPENCM3_ST_USBFS_COMMON_H
45#define LIBOPENCM3_ST_USBFS_COMMON_H
46
48
49/*****************************************************************************/
50/* Module definitions */
51/*****************************************************************************/
52
53/*****************************************************************************/
54/* Register definitions */
55/*****************************************************************************/
56
57/* --- USB general registers ----------------------------------------------- */
58
59/* USB Control register */
60#define USB_CNTR_REG (&MMIO32(USB_DEV_FS_BASE + 0x40))
61/* USB Interrupt status register */
62#define USB_ISTR_REG (&MMIO32(USB_DEV_FS_BASE + 0x44))
63/* USB Frame number register */
64#define USB_FNR_REG (&MMIO32(USB_DEV_FS_BASE + 0x48))
65/* USB Device address register */
66#define USB_DADDR_REG (&MMIO32(USB_DEV_FS_BASE + 0x4C))
67/* USB Buffer table address register */
68#define USB_BTABLE_REG (&MMIO32(USB_DEV_FS_BASE + 0x50))
69
70/* USB EP register */
71#define USB_EP_REG(EP) (&MMIO32(USB_DEV_FS_BASE) + (EP))
72
73
74/*****************************************************************************/
75/* Register values */
76/*****************************************************************************/
77
78/* --- USB control register masks / bits ----------------------------------- */
79
80/* Interrupt mask bits, set to 1 to enable interrupt generation */
81#define USB_CNTR_CTRM 0x8000
82#define USB_CNTR_PMAOVRM 0x4000
83#define USB_CNTR_ERRM 0x2000
84#define USB_CNTR_WKUPM 0x1000
85#define USB_CNTR_SUSPM 0x0800
86#define USB_CNTR_RESETM 0x0400
87#define USB_CNTR_SOFM 0x0200
88#define USB_CNTR_ESOFM 0x0100
89
90/* Request/Force bits */
91#define USB_CNTR_RESUME 0x0010 /* Resume request */
92#define USB_CNTR_FSUSP 0x0008 /* Force suspend */
93#define USB_CNTR_LP_MODE 0x0004 /* Low-power mode */
94#define USB_CNTR_PWDN 0x0002 /* Power down */
95#define USB_CNTR_FRES 0x0001 /* Force reset */
96
97/* --- USB interrupt status register masks / bits -------------------------- */
98
99#define USB_ISTR_CTR 0x8000 /* Correct Transfer */
100#define USB_ISTR_PMAOVR 0x4000 /* Packet Memory Area Over / Underrun */
101#define USB_ISTR_ERR 0x2000 /* Error */
102#define USB_ISTR_WKUP 0x1000 /* Wake up */
103#define USB_ISTR_SUSP 0x0800 /* Suspend mode request */
104#define USB_ISTR_RESET 0x0400 /* USB RESET request */
105#define USB_ISTR_SOF 0x0200 /* Start Of Frame */
106#define USB_ISTR_ESOF 0x0100 /* Expected Start Of Frame */
107#define USB_ISTR_DIR 0x0010 /* Direction of transaction */
108#define USB_ISTR_EP_ID 0x000F /* Endpoint Identifier */
109
110/* --- USB interrupt status register manipulators -------------------------- */
111
112/* Note: CTR is read only! */
113#define USB_CLR_ISTR_PMAOVR() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_PMAOVR)
114#define USB_CLR_ISTR_ERR() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_ERR)
115#define USB_CLR_ISTR_WKUP() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_WKUP)
116#define USB_CLR_ISTR_SUSP() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_SUSP)
117#define USB_CLR_ISTR_RESET() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_RESET)
118#define USB_CLR_ISTR_SOF() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_SOF)
119#define USB_CLR_ISTR_ESOF() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_ESOF)
120
121/* --- USB Frame Number Register bits -------------------------------------- */
122
123#define USB_FNR_RXDP (1 << 15)
124#define USB_FNR_RXDM (1 << 14)
125#define USB_FNR_LCK (1 << 13)
126
127#define USB_FNR_LSOF_SHIFT 11
128#define USB_FNR_LSOF (3 << USB_FNR_LSOF_SHIFT)
129
130#define USB_FNR_FN (0x7FF << 0)
131
132/* --- USB device address register masks / bits ---------------------------- */
133
134#define USB_DADDR_EF (1 << 7)
135#define USB_DADDR_ADDR 0x007F
136
137/* USB_BTABLE Values ------------------------------------------------------- */
138
139#define USB_BTABLE_BTABLE 0xFFF8
140
141/* --- USB device address register manipulators ---------------------------- */
142
143/* --- USB endpoint register offsets --------------------------------------- */
144
145#define USB_EP0 0
146#define USB_EP1 1
147#define USB_EP2 2
148#define USB_EP3 3
149#define USB_EP4 4
150#define USB_EP5 5
151#define USB_EP6 6
152#define USB_EP7 7
153
154/* --- USB endpoint register masks / bits ---------------------------------- */
155
156/* Masks and toggle bits */
157#define USB_EP_RX_CTR 0x8000 /* Correct transfer RX */
158#define USB_EP_RX_DTOG 0x4000 /* Data toggle RX */
159#define USB_EP_RX_STAT 0x3000 /* Endpoint status for RX */
160
161#define USB_EP_SETUP 0x0800 /* Setup transaction completed */
162#define USB_EP_TYPE 0x0600 /* Endpoint type */
163#define USB_EP_KIND 0x0100 /* Endpoint kind.
164 * When set and type=bulk -> double buffer
165 * When set and type=control -> status out
166 */
168#define USB_EP_TX_CTR 0x0080 /* Correct transfer TX */
169#define USB_EP_TX_DTOG 0x0040 /* Data toggle TX */
170#define USB_EP_TX_STAT 0x0030 /* Endpoint status for TX */
171
172#define USB_EP_ADDR 0x000F /* Endpoint Address */
173
174/* Masking all toggle bits */
175#define USB_EP_NTOGGLE_MSK (USB_EP_RX_CTR | \
176 USB_EP_SETUP | \
177 USB_EP_TYPE | \
178 USB_EP_KIND | \
179 USB_EP_TX_CTR | \
180 USB_EP_ADDR)
181
182/* All non toggle bits plus EP_RX toggle bits */
183#define USB_EP_RX_STAT_TOG_MSK (USB_EP_RX_STAT | USB_EP_NTOGGLE_MSK)
184/* All non toggle bits plus EP_TX toggle bits */
185#define USB_EP_TX_STAT_TOG_MSK (USB_EP_TX_STAT | USB_EP_NTOGGLE_MSK)
187/* Endpoint status bits for USB_EP_RX_STAT bit field */
188#define USB_EP_RX_STAT_DISABLED 0x0000
189#define USB_EP_RX_STAT_STALL 0x1000
190#define USB_EP_RX_STAT_NAK 0x2000
191#define USB_EP_RX_STAT_VALID 0x3000
193/* Endpoint status bits for USB_EP_TX_STAT bit field */
194#define USB_EP_TX_STAT_DISABLED 0x0000
195#define USB_EP_TX_STAT_STALL 0x0010
196#define USB_EP_TX_STAT_NAK 0x0020
197#define USB_EP_TX_STAT_VALID 0x0030
199/* Endpoint type bits for USB_EP_TYPE bit field */
200#define USB_EP_TYPE_BULK 0x0000
201#define USB_EP_TYPE_CONTROL 0x0200
202#define USB_EP_TYPE_ISO 0x0400
203#define USB_EP_TYPE_INTERRUPT 0x0600
204
205/* --- USB endpoint register manipulators ---------------------------------- */
206
207/*
208 * Set USB endpoint tx/rx status.
209 *
210 * USB status field is changed using an awkward toggle mechanism, that
211 * is why we use some helper macros for that.
212 */
213#define USB_SET_EP_RX_STAT(EP, STAT) \
214 TOG_SET_REG_BIT_MSK_AND_SET(USB_EP_REG(EP), \
215 USB_EP_RX_STAT_TOG_MSK, STAT, USB_EP_RX_CTR | USB_EP_TX_CTR)
216
217#define USB_SET_EP_TX_STAT(EP, STAT) \
218 TOG_SET_REG_BIT_MSK_AND_SET(USB_EP_REG(EP), \
219 USB_EP_TX_STAT_TOG_MSK, STAT, USB_EP_RX_CTR | USB_EP_TX_CTR)
220
221/*
222 * Macros for clearing and setting USB endpoint register bits that do
223 * not use the toggle mechanism.
224 *
225 * Because the register contains some bits that use the toggle
226 * mechanism we need a helper macro here. Otherwise the code gets really messy.
227 */
228#define USB_CLR_EP_NTOGGLE_BIT_AND_SET(EP, BIT, EXTRA_BITS) \
229 CLR_REG_BIT_MSK_AND_SET(USB_EP_REG(EP), \
230 USB_EP_NTOGGLE_MSK, BIT, EXTRA_BITS)
231
232#define USB_CLR_EP_RX_CTR(EP) \
233 USB_CLR_EP_NTOGGLE_BIT_AND_SET(EP, USB_EP_RX_CTR, USB_EP_TX_CTR)
234
235#define USB_CLR_EP_TX_CTR(EP) \
236 USB_CLR_EP_NTOGGLE_BIT_AND_SET(EP, USB_EP_TX_CTR, USB_EP_RX_CTR)
237
238
239#define USB_SET_EP_TYPE(EP, TYPE) \
240 SET_REG(USB_EP_REG(EP), \
241 (GET_REG(USB_EP_REG(EP)) & \
242 (USB_EP_NTOGGLE_MSK & \
243 (~USB_EP_TYPE))) | TYPE)
244
245#define USB_SET_EP_KIND(EP) \
246 SET_REG(USB_EP_REG(EP), \
247 (GET_REG(USB_EP_REG(EP)) & \
248 (USB_EP_NTOGGLE_MSK & \
249 (~USB_EP_KIND))) | USB_EP_KIND)
250
251#define USB_CLR_EP_KIND(EP) \
252 SET_REG(USB_EP_REG(EP), \
253 (GET_REG(USB_EP_REG(EP)) & \
254 (USB_EP_NTOGGLE_MSK & (~USB_EP_KIND))))
255
256#define USB_SET_EP_STAT_OUT(EP) USB_SET_EP_KIND(EP)
257#define USB_CLR_EP_STAT_OUT(EP) USB_CLR_EP_KIND(EP)
258
259#define USB_SET_EP_ADDR(EP, ADDR) \
260 SET_REG(USB_EP_REG(EP), \
261 ((GET_REG(USB_EP_REG(EP)) & \
262 (USB_EP_NTOGGLE_MSK & \
263 (~USB_EP_ADDR))) | ADDR))
264
265/* Macros for clearing DTOG bits */
266#define USB_CLR_EP_TX_DTOG(EP) \
267 SET_REG(USB_EP_REG(EP), \
268 GET_REG(USB_EP_REG(EP)) & \
269 (USB_EP_NTOGGLE_MSK | USB_EP_TX_DTOG))
270
271#define USB_CLR_EP_RX_DTOG(EP) \
272 SET_REG(USB_EP_REG(EP), \
273 GET_REG(USB_EP_REG(EP)) & \
274 (USB_EP_NTOGGLE_MSK | USB_EP_RX_DTOG))
275
277/* --- USB BTABLE registers ------------------------------------------------ */
278
279#define USB_GET_BTABLE GET_REG(USB_BTABLE_REG)
281/* --- USB BTABLE manipulators --------------------------------------------- */
283#define USB_GET_EP_TX_ADDR(EP) GET_REG(USB_EP_TX_ADDR(EP))
284#define USB_GET_EP_TX_COUNT(EP) GET_REG(USB_EP_TX_COUNT(EP))
285#define USB_GET_EP_RX_ADDR(EP) GET_REG(USB_EP_RX_ADDR(EP))
286#define USB_GET_EP_RX_COUNT(EP) GET_REG(USB_EP_RX_COUNT(EP))
287#define USB_SET_EP_TX_ADDR(EP, ADDR) SET_REG(USB_EP_TX_ADDR(EP), ADDR)
288#define USB_SET_EP_TX_COUNT(EP, COUNT) SET_REG(USB_EP_TX_COUNT(EP), COUNT)
289#define USB_SET_EP_RX_ADDR(EP, ADDR) SET_REG(USB_EP_RX_ADDR(EP), ADDR)
290#define USB_SET_EP_RX_COUNT(EP, COUNT) SET_REG(USB_EP_RX_COUNT(EP), COUNT)
291
292
293
294/**@}*/
295
296#endif
297/** @cond */
298#else
299#error "st_usbfs_common.h should not be included explicitly, only via st_usbfs.h"
300#endif
301/** @endcond */
302