libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
g0/dmamux.h
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1/** @defgroup dmamux_defines DMAMUX Defines
2 *
3 * @ingroup STM32G0xx_defines
4 *
5 * @author @htmlonly © @endhtmlonly 2019
6 * Guillaume Revaillot <g.revaillot@gmail.com>
7 *
8 * @brief Defined Constants and Types for the STM32G0xx DMAMUX DMA request router
9 *
10 * @version 1.0.0
11 *
12 * LGPL License Terms @ref lgpl_license
13 */
14
15/*
16 * This file is part of the libopencm3 project.
17 *
18 * This library is free software: you can redistribute it and/or modify
19 * it under the terms of the GNU Lesser General Public License as published by
20 * the Free Software Foundation, either version 3 of the License, or
21 * (at your option) any later version.
22 *
23 * This library is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU Lesser General Public License for more details.
27 *
28 * You should have received a copy of the GNU Lesser General Public License
29 * along with this library. If not, see <http://www.gnu.org/licenses/>.
30 */
31
32#pragma once
33/**@{*/
34
35#include <libopencm3/stm32/common/dmamux_common_all.h>
36
37 /** @defgroup dmamux_reg_base DMAMUX register base addresses
38 * @{
39 */
40#define DMAMUX1 DMAMUX_BASE
41/**@}*/
42
43/* --- DMAMUX_CxCR values ------------------------------------ */
44
45/** @defgroup dmamux_cxcr_sync_id SYNCID Synchronization input selected
46@{*/
47#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE0 0
48#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE1 1
49#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE2 2
50#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE3 3
51#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE4 4
52#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE5 5
53#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE6 6
54#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE7 7
55#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE8 8
56#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE9 9
57#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE10 10
58#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE11 11
59#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE12 12
60#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE13 13
61#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE14 14
62#define DMAMUX_CxCR_SYNC_ID_EXTI_LINE15 15
63#define DMAMUX_CxCR_SYNC_ID_DMAMUX_EVT0 16
64#define DMAMUX_CxCR_SYNC_ID_DMAMUX_EVT1 17
65#define DMAMUX_CxCR_SYNC_ID_DMAMUX_EVT2 18
66#define DMAMUX_CxCR_SYNC_ID_DMAMUX_EVT3 19
67#define DMAMUX_CxCR_SYNC_ID_LPTIM1_OUT 20
68#define DMAMUX_CxCR_SYNC_ID_LPTIM2_OUT 21
69#define DMAMUX_CxCR_SYNC_ID_TIM14_OC 22
70#define DMAMUX_CxCR_SYNC_ID_RESERVED23 23
71/**@}*/
72
73/** @defgroup dmamux_cxcr_dmareq_id DMAREQID DMA request line selected
74@{*/
75#define DMAMUX_CxCR_DMAREQ_ID_DMAMUX_REQ_GEN0 1
76#define DMAMUX_CxCR_DMAREQ_ID_DMAMUX_REQ_GEN1 2
77#define DMAMUX_CxCR_DMAREQ_ID_DMAMUX_REQ_GEN2 3
78#define DMAMUX_CxCR_DMAREQ_ID_DMAMUX_REQ_GEN3 4
79#define DMAMUX_CxCR_DMAREQ_ID_ADC 5
80#define DMAMUX_CxCR_DMAREQ_ID_AES_IN 6
81#define DMAMUX_CxCR_DMAREQ_ID_AES_OUT 7
82#define DMAMUX_CxCR_DMAREQ_ID_DAC_Channel1 8
83#define DMAMUX_CxCR_DMAREQ_ID_DAC_Channel2 9
84#define DMAMUX_CxCR_DMAREQ_ID_I2C1_RX 10
85#define DMAMUX_CxCR_DMAREQ_ID_I2C1_TX 11
86#define DMAMUX_CxCR_DMAREQ_ID_I2C2_RX 12
87#define DMAMUX_CxCR_DMAREQ_ID_I2C2_TX 13
88#define DMAMUX_CxCR_DMAREQ_ID_LPUART_RX 14
89#define DMAMUX_CxCR_DMAREQ_ID_LPUART_TX 15
90#define DMAMUX_CxCR_DMAREQ_ID_SPI1_RX 16
91#define DMAMUX_CxCR_DMAREQ_ID_SPI1_TX 17
92#define DMAMUX_CxCR_DMAREQ_ID_SPI2_RX 18
93#define DMAMUX_CxCR_DMAREQ_ID_SPI2_TX 19
94#define DMAMUX_CxCR_DMAREQ_ID_TIM1_CH1 20
95#define DMAMUX_CxCR_DMAREQ_ID_TIM1_CH2 21
96#define DMAMUX_CxCR_DMAREQ_ID_TIM1_CH3 22
97#define DMAMUX_CxCR_DMAREQ_ID_TIM1_CH4 23
98#define DMAMUX_CxCR_DMAREQ_ID_TIM1_TRIG_COM 24
99#define DMAMUX_CxCR_DMAREQ_ID_TIM1_UP 25
100#define DMAMUX_CxCR_DMAREQ_ID_TIM2_CH1 26
101#define DMAMUX_CxCR_DMAREQ_ID_TIM2_CH2 27
102#define DMAMUX_CxCR_DMAREQ_ID_TIM2_CH3 28
103#define DMAMUX_CxCR_DMAREQ_ID_TIM2_CH4 29
104#define DMAMUX_CxCR_DMAREQ_ID_TIM2_TRIG 30
105#define DMAMUX_CxCR_DMAREQ_ID_TIM2_UP 31
106#define DMAMUX_CxCR_DMAREQ_ID_TIM3_CH1 32
107#define DMAMUX_CxCR_DMAREQ_ID_TIM3_CH2 33
108#define DMAMUX_CxCR_DMAREQ_ID_TIM3_CH3 34
109#define DMAMUX_CxCR_DMAREQ_ID_TIM3_CH4 35
110#define DMAMUX_CxCR_DMAREQ_ID_TIM3_TRIG 36
111#define DMAMUX_CxCR_DMAREQ_ID_TIM3_UP 37
112#define DMAMUX_CxCR_DMAREQ_ID_TIM6_UP 38
113#define DMAMUX_CxCR_DMAREQ_ID_TIM7_UP 39
114#define DMAMUX_CxCR_DMAREQ_ID_TIM15_CH1 40
115#define DMAMUX_CxCR_DMAREQ_ID_TIM15_CH2 41
116#define DMAMUX_CxCR_DMAREQ_ID_TIM15_TRIG_COM 42
117#define DMAMUX_CxCR_DMAREQ_ID_TIM15_UP 43
118#define DMAMUX_CxCR_DMAREQ_ID_TIM16_CH1 44
119#define DMAMUX_CxCR_DMAREQ_ID_TIM16_TRIG_COM 45
120#define DMAMUX_CxCR_DMAREQ_ID_TIM16_UP 46
121#define DMAMUX_CxCR_DMAREQ_ID_TIM17_CH1 47
122#define DMAMUX_CxCR_DMAREQ_ID_TIM17_TRIG_COM 48
123#define DMAMUX_CxCR_DMAREQ_ID_TIM17_UP 49
124#define DMAMUX_CxCR_DMAREQ_ID_USART1_RX 50
125#define DMAMUX_CxCR_DMAREQ_ID_USART1_TX 51
126#define DMAMUX_CxCR_DMAREQ_ID_USART2_RX 52
127#define DMAMUX_CxCR_DMAREQ_ID_USART2_TX 53
128#define DMAMUX_CxCR_DMAREQ_ID_USART3_RX 54
129#define DMAMUX_CxCR_DMAREQ_ID_USART3_TX 55
130#define DMAMUX_CxCR_DMAREQ_ID_USART4_RX 56
131#define DMAMUX_CxCR_DMAREQ_ID_USART4_TX 57
132#define DMAMUX_CxCR_DMAREQ_ID_UCPD1_RX 58
133#define DMAMUX_CxCR_DMAREQ_ID_UCPD1_TX 59
134#define DMAMUX_CxCR_DMAREQ_ID_UCPD2_RX 60
135#define DMAMUX_CxCR_DMAREQ_ID_UCPD2_TX 61
136#define DMAMUX_CxCR_DMAREQ_ID_RESERVED62 62
137#define DMAMUX_CxCR_DMAREQ_ID_RESERVED63 63
138/**@}*/
139
140/* --- DMAMUX_RGxCR values ----------------------------------- */
141
142/** @defgroup dmamux_rgxcr_sig_id SIGID DMA request trigger input selected
143@{*/
144#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE0 0
145#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE1 1
146#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE2 2
147#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE3 3
148#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE4 4
149#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE5 5
150#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE6 6
151#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE7 7
152#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE8 8
153#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE9 9
154#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE10 10
155#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE11 11
156#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE12 12
157#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE13 13
158#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE14 14
159#define DMAMUX_RGxCR_SIG_ID_EXTI_LINE15 15
160#define DMAMUX_RGxCR_SIG_ID_DMAMUX_EVT0 16
161#define DMAMUX_RGxCR_SIG_ID_DMAMUX_EVT1 17
162#define DMAMUX_RGxCR_SIG_ID_DMAMUX_EVT2 18
163#define DMAMUX_RGxCR_SIG_ID_DMAMUX_EVT3 19
164#define DMAMUX_RGxCR_SIG_ID_LPTIM1_OUT 20
165#define DMAMUX_RGxCR_SIG_ID_LPTIM2_OUT 21
166#define DMAMUX_RGxCR_SIG_ID_TIM14_OC 22
167#define DMAMUX_RGxCR_SIG_ID_RESERVED 23
168/**@}*/
169
170/**@}*/
dmamux_common_all.h