29#ifndef LIBOPENCM3_FLASH_H
30#define LIBOPENCM3_FLASH_H
36#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
37#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
38#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0c)
39#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
40#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
41#define FLASH_ECCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x18)
42#define FLASH_OPTR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
43#define FLASH_PCROP1ASR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x24)
44#define FLASH_PCROP1AER MMIO32(FLASH_MEM_INTERFACE_BASE + 0x28)
45#define FLASH_WRP1AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x2c)
46#define FLASH_WRP1BR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x30)
47#define FLASH_PCROP1BSR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x34)
48#define FLASH_PCROP1BER MMIO32(FLASH_MEM_INTERFACE_BASE + 0x38)
49#define FLASH_SECR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x80)
57#define FLASH_ACR_DBG_SWEN (1 << 18)
59#define FLASH_ACR_EMPTY (1 << 16)
61#define FLASH_ACR_ICRST (1 << 11)
63#define FLASH_ACR_ICEN (1 << 9)
65#define FLASH_ACR_PRFTEN (1 << 8)
67#define FLASH_ACR_LATENCY_SHIFT 0
68#define FLASH_ACR_LATENCY_MASK 0x7
72#define FLASH_ACR_LATENCY_0WS 0x00
73#define FLASH_ACR_LATENCY_1WS 0x01
74#define FLASH_ACR_LATENCY_2WS 0x02
83#define FLASH_KEYR_KEY1 ((uint32_t)0x45670123)
85#define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)
93#define FLASH_OPTKEYR_KEY1 ((uint32_t)0x08192a3b)
95#define FLASH_OPTKEYR_KEY2 ((uint32_t)0x4c5d6e7f)
103#define FLASH_SR_CFGBSY (1 << 18)
105#define FLASH_SR_BSY (1 << 16)
107#define FLASH_SR_OPTVERR (1 << 15)
109#define FLASH_SR_RDERR (1 << 14)
111#define FLASH_SR_FASTERR (1 << 9)
113#define FLASH_SR_MISERR (1 << 8)
115#define FLASH_SR_PGSERR (1 << 7)
117#define FLASH_SR_SIZERR (1 << 6)
119#define FLASH_SR_PGAERR (1 << 5)
121#define FLASH_SR_WRPERR (1 << 4)
123#define FLASH_SR_PROGERR (1 << 3)
125#define FLASH_SR_OPERR (1 << 1)
127#define FLASH_SR_EOP (1 << 0)
135#define FLASH_CR_LOCK (1 << 31)
137#define FLASH_CR_OPTLOCK (1 << 30)
139#define FLASH_CR_SEC_PROT (1 << 28)
141#define FLASH_CR_OBL_LAUNCH (1 << 27)
143#define FLASH_CR_RDERRIE (1 << 26)
145#define FLASH_CR_ERRIE (1 << 25)
147#define FLASH_CR_EOPIE (1 << 24)
149#define FLASH_CR_FSTPG (1 << 18)
151#define FLASH_CR_OPTSTRT (1 << 17)
153#define FLASH_CR_STRT (1 << 16)
155#define FLASH_CR_PNB_SHIFT 3
156#define FLASH_CR_PNB_MASK 0x3f
159#define FLASH_CR_MER (1 << 2)
161#define FLASH_CR_PER (1 << 1)
163#define FLASH_CR_PG (1 << 0)
170#define FLASH_ECCR_ECCD (1 << 31)
172#define FLASH_ECCR_ECCC (1 << 30)
174#define FLASH_ECCR_ECCIE (1 << 24)
176#define FLASH_ECCR_SYSF_ECC (1 << 20)
178#define FLASH_ECCR_ADDR_ECC_SHIFT 0
179#define FLASH_ECCR_ADDR_ECC_MASK 0x3fff
187#define FLASH_OPTR_IRHEN (1 << 29)
189#define FLASH_OPTR_NRST_MODE_SHIFT 27
190#define FLASH_OPTR_NRST_MODE_MASK 0x03
194#define FLASH_OPTR_NRST_MODE_RESET 1
195#define FLASH_OPTR_NRST_MODE_GPIO 2
196#define FLASH_OPTR_NRST_MODE_BIDIR 3
200#define FLASH_OPTR_nBOOT0 (1 << 26)
202#define FLASH_OPTR_nBOOT1 (1 << 25)
204#define FLASH_OPTR_nBOOT_SEL (1 << 24)
206#define FLASH_OPTR_RAM_PARITY_CHECK (1 << 22)
208#define FLASH_OPTR_WWDG_SW (1 << 19)
210#define FLASH_OPTR_IWDG_STDBY (1 << 18)
212#define FLASH_OPTR_IWDG_STOP (1 << 17)
214#define FLASH_OPTR_IDWG_SW (1 << 16)
216#define FLASH_OPTR_nRSTS_HDW (1 << 15)
218#define FLASH_OPTR_nRST_STDBY (1 << 14)
220#define FLASH_OPTR_nRST_STOP (1 << 13)
222#define FLASH_OPTR_BORR_LEV_SHIFT 11
223#define FLASH_OPTR_BORR_LEV_MASK 0x03
227#define FLASH_OPTR_BORR_LEV_2V1 0
228#define FLASH_OPTR_BORR_LEV_2V3 1
229#define FLASH_OPTR_BORR_LEV_2V6 2
230#define FLASH_OPTR_BORR_LEV_2V9 3
233#define FLASH_OPTR_BORF_LEV_SHIFT 9
234#define FLASH_OPTR_BORF_LEV_MASK 0x03
238#define FLASH_OPTR_BORF_LEV_2V0 0
239#define FLASH_OPTR_BORF_LEV_2V2 1
240#define FLASH_OPTR_BORF_LEV_2V5 2
241#define FLASH_OPTR_BORF_LEV_2V8 3
245#define FLASH_OPTR_BOREN (1 << 8)
247#define FLASH_OPTR_RDP_SHIFT 0
248#define FLASH_OPTR_RDP_MASK 0xff
252#define FLASH_OPTR_RDP_LEVEL_0 0xAA
253#define FLASH_OPTR_RDP_LEVEL_1 0xBB
254#define FLASH_OPTR_RDP_LEVEL_2 0xCC
274void flash_program(uint32_t address, uint8_t *data, uint32_t len);
void flash_unlock_progmem(void)
Unlock program memory.
void flash_icache_disable(void)
Disable instruction cache.
void flash_erase_page(uint32_t page)
Erase a page of FLASH.
void flash_lock_option_bytes(void)
Lock Option Byte Access.
void flash_lock_progmem(void)
lock program memory
void flash_wait_for_last_operation(void)
Wait until Last Flash Operation has Ended.
void flash_clear_pgaerr_flag(void)
Clear the Programming Alignment Error Flag.
void flash_clear_pgserr_flag(void)
Clear the Programming Sequence Error Flag.
void flash_icache_reset(void)
Reset instruction cache.
void flash_clear_eop_flag(void)
Clear the End of Operation Flag.
void flash_clear_status_flags(void)
Clear All Status Flags.
void flash_program(uint32_t address, uint8_t *data, uint32_t len)
Program a Data Block to FLASH.
void flash_icache_enable(void)
Enable instruction cache.
void flash_clear_size_flag(void)
Clear programming size error flag.
void flash_program_double_word(uint32_t address, uint64_t data)
Program a 64bits word to FLASH.
void flash_clear_progerr_flag(void)
Clear the Programming Error Status Flag.
void flash_clear_operr_flag(void)
Clear the Operation Error Status Flag.
void flash_clear_wrperr_flag(void)
Clear the Write Protected Error Flag.
void flash_erase_all_pages(void)
Erase All FLASH This performs all operations necessary to erase all sectors in the FLASH memory.