libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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Defined Constants and Types for the EFM32HG Clock Management Unit More...
Enumerations | |
enum | cmu_periph_clken { CMU_PCNT0 = _REG_BIT(0x078, 1) , CMU_USBLE = _REG_BIT(0x064, 0) , CMU_LEUART0 = _REG_BIT(0x060, 0) , CMU_RTC = _REG_BIT(0x058, 0) , CMU_I2C0 = _REG_BIT(0x044, 11) , CMU_ADC0 = _REG_BIT(0x044, 10) , CMU_VCMP = _REG_BIT(0x044, 9) , CMU_GPIO = _REG_BIT(0x044, 8) , CMU_IDAC0 = _REG_BIT(0x044, 7) , CMU_PRS = _REG_BIT(0x044, 6) , CMU_ACMP0 = _REG_BIT(0x044, 5) , CMU_USART1 = _REG_BIT(0x044, 4) , CMU_USART0 = _REG_BIT(0x044, 3) , CMU_TIMER2 = _REG_BIT(0x044, 2) , CMU_TIMER1 = _REG_BIT(0x044, 1) , CMU_TIMER0 = _REG_BIT(0x044, 0) , CMU_USB = _REG_BIT(0x040, 4) , CMU_USBC = _REG_BIT(0x040, 3) , CMU_LE = _REG_BIT(0x040, 2) , CMU_DMA = _REG_BIT(0x040, 1) } |
enum | cmu_osc { HFRCO , LFRCO , HFXO , LFXO , AUXHFRCO , USHFRCO , USHFRCODIV2 } |
Functions | |
void | cmu_enable_lock (void) |
Enable CMU registers lock. More... | |
void | cmu_disable_lock (void) |
Disable CMU registers lock. More... | |
bool | cmu_get_lock_flag (void) |
Get CMU register lock flag. More... | |
void | cmu_periph_clock_enable (enum cmu_periph_clken periph) |
Enable Peripheral Clock in running mode. More... | |
void | cmu_periph_clock_disable (enum cmu_periph_clken periph) |
Disable Peripheral Clock in running mode. More... | |
void | cmu_osc_on (enum cmu_osc osc) |
Turn on Oscillator. More... | |
void | cmu_osc_off (enum cmu_osc osc) |
Turn off Oscillator. More... | |
bool | cmu_osc_ready_flag (enum cmu_osc osc) |
Get Oscillator read flag. More... | |
void | cmu_wait_for_osc_ready (enum cmu_osc osc) |
Wait while oscillator is not ready. More... | |
void | cmu_set_hfclk_source (enum cmu_osc osc) |
Set HFCLK clock source. More... | |
enum cmu_osc | cmu_get_hfclk_source (void) |
Get HFCLK clock source. More... | |
void | cmu_set_usbclk_source (enum cmu_osc osc) |
Set USBCLK clock source. More... | |
void | cmu_wait_for_usbclk_selected (enum cmu_osc osc) |
Wait while USBCLK is not selected. More... | |
Defined Constants and Types for the EFM32HG Clock Management Unit
LGPL License Terms libopencm3 License
#define CMU_AUXHFRCOCTRL_BAND | ( | v | ) | (((v) << CMU_AUXHFRCOCTRL_BAND_SHIFT) & CMU_AUXHFRCOCTRL_BAND_MASK) |
#define CMU_AUXHFRCOCTRL_BAND_11MHZ CMU_AUXHFRCOCTRL_BAND(1) |
#define CMU_AUXHFRCOCTRL_BAND_14MHZ CMU_AUXHFRCOCTRL_BAND(0) |
#define CMU_AUXHFRCOCTRL_BAND_1MHZ CMU_AUXHFRCOCTRL_BAND(3) |
#define CMU_AUXHFRCOCTRL_BAND_21MHZ CMU_AUXHFRCOCTRL_BAND(7) |
#define CMU_AUXHFRCOCTRL_BAND_28MHZ CMU_AUXHFRCOCTRL_BAND(6) |
#define CMU_AUXHFRCOCTRL_BAND_7MHZ CMU_AUXHFRCOCTRL_BAND(2) |
#define CMU_AUXHFRCOCTRL_BAND_MASK (0x7 << CMU_AUXHFRCOCTRL_BAND_SHIFT) |
#define CMU_AUXHFRCOCTRL_TUNING | ( | v | ) | (((v) << CMU_AUXHFRCOCTRL_TUNING_SHIFT) & CMU_AUXHFRCOCTRL_TUNING_MASK) |
#define CMU_AUXHFRCOCTRL_TUNING_MASK (0xFF << CMU_AUXHFRCOCTRL_TUNING_SHIFT) |
#define CMU_CALCNT_CALCNT | ( | v | ) | (((v) << CMU_CALCNT_CALCNT_SHIFT) & CMU_CALCNT_CALCNT_MASK) |
#define CMU_CALCNT_CALCNT_MASK (0xFFFFF << CMU_CALCNT_CALCNT_SHIFT) |
#define CMU_CALCTRL_DOWNSEL | ( | v | ) | (((v) << CMU_CALCTRL_DOWNSEL_SHIFT) & CMU_CALCTRL_DOWNSEL_MASK) |
#define CMU_CALCTRL_DOWNSEL_AUXHFRCO CMU_CALCTRL_DOWNSEL(5) |
#define CMU_CALCTRL_DOWNSEL_HFCLK CMU_CALCTRL_DOWNSEL(0) |
#define CMU_CALCTRL_DOWNSEL_HFRCO CMU_CALCTRL_DOWNSEL(3) |
#define CMU_CALCTRL_DOWNSEL_HFXO CMU_CALCTRL_DOWNSEL(1) |
#define CMU_CALCTRL_DOWNSEL_LFRCO CMU_CALCTRL_DOWNSEL(4) |
#define CMU_CALCTRL_DOWNSEL_LFXO CMU_CALCTRL_DOWNSEL(2) |
#define CMU_CALCTRL_DOWNSEL_MASK (0x7 << CMU_CALCTRL_DOWNSEL_SHIFT) |
#define CMU_CALCTRL_DOWNSEL_USHFRCO CMU_CALCTRL_DOWNSEL(6) |
#define CMU_CALCTRL_UPSEL | ( | v | ) | (((v) << CMU_CALCTRL_UPSEL_SHIFT) & CMU_CALCTRL_UPSEL_MASK) |
#define CMU_CALCTRL_UPSEL_AUXHFRCO CMU_CALCTRL_UPSEL(4) |
#define CMU_CALCTRL_UPSEL_HFRCO CMU_CALCTRL_UPSEL(2) |
#define CMU_CALCTRL_UPSEL_HFXO CMU_CALCTRL_UPSEL(0) |
#define CMU_CALCTRL_UPSEL_LFRCO CMU_CALCTRL_UPSEL(3) |
#define CMU_CALCTRL_UPSEL_LFXO CMU_CALCTRL_UPSEL(1) |
#define CMU_CALCTRL_UPSEL_MASK (0x7 << CMU_CALCTRL_UPSEL_SHIFT) |
#define CMU_CALCTRL_UPSEL_USHFRCO CMU_CALCTRL_UPSEL(5) |
#define CMU_CMD_HFCLKSEL | ( | v | ) | (((v) << CMU_CMD_HFCLKSEL_SHIFT) & CMU_CMD_HFCLKSEL_MASK) |
#define CMU_CMD_HFCLKSEL_HFRCO CMU_CMD_HFCLKSEL(1) |
#define CMU_CMD_HFCLKSEL_HFXO CMU_CMD_HFCLKSEL(2) |
#define CMU_CMD_HFCLKSEL_LFRCO CMU_CMD_HFCLKSEL(3) |
#define CMU_CMD_HFCLKSEL_LFXO CMU_CMD_HFCLKSEL(4) |
#define CMU_CMD_HFCLKSEL_MASK (0x7 << CMU_CMD_HFCLKSEL_SHIFT) |
#define CMU_CMD_HFCLKSEL_USHFRCODIV2 CMU_CMD_HFCLKSEL(5) |
#define CMU_CMD_USBCCLKSEL | ( | v | ) | (((v) << CMU_CMD_USBCCLKSEL_SHIFT) & CMU_CMD_USBCCLKSEL_MASK) |
#define CMU_CMD_USBCCLKSEL_LFRCO CMU_CMD_USBCCLKSEL(3) |
#define CMU_CMD_USBCCLKSEL_LFXO CMU_CMD_USBCCLKSEL(2) |
#define CMU_CMD_USBCCLKSEL_MASK (0x5 << CMU_CMD_USBCCLKSEL_SHIFT) |
#define CMU_CMD_USBCCLKSEL_USHFRCO CMU_CMD_USBCCLKSEL(4) |
#define CMU_CTRL_CLKOUTSEL0 | ( | v | ) | (((v) << CMU_CTRL_CLKOUTSEL0_SHIFT) & CMU_CTRL_CLKOUTSEL0_MASK) |
#define CMU_CTRL_CLKOUTSEL0_AUXHFRCO CMU_CTRL_CLKOUTSEL0(7) |
#define CMU_CTRL_CLKOUTSEL0_HFCLK16 CMU_CTRL_CLKOUTSEL0(5) |
#define CMU_CTRL_CLKOUTSEL0_HFCLK2 CMU_CTRL_CLKOUTSEL0(2) |
#define CMU_CTRL_CLKOUTSEL0_HFCLK4 CMU_CTRL_CLKOUTSEL0(3) |
#define CMU_CTRL_CLKOUTSEL0_HFCLK8 CMU_CTRL_CLKOUTSEL0(4) |
#define CMU_CTRL_CLKOUTSEL0_HFRCO CMU_CTRL_CLKOUTSEL0(0) |
#define CMU_CTRL_CLKOUTSEL0_HFXO CMU_CTRL_CLKOUTSEL0(1) |
#define CMU_CTRL_CLKOUTSEL0_MASK (0x7 << CMU_CTRL_CLKOUTSEL0_SHIFT) |
#define CMU_CTRL_CLKOUTSEL0_ULFRCO CMU_CTRL_CLKOUTSEL0(6) |
#define CMU_CTRL_CLKOUTSEL1 | ( | v | ) | (((v) << CMU_CTRL_CLKOUTSEL1_SHIFT) & CMU_CTRL_CLKOUTSEL1_MASK) |
#define CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ CMU_CTRL_CLKOUTSEL1(7) |
#define CMU_CTRL_CLKOUTSEL1_HFCLK CMU_CTRL_CLKOUTSEL1(2) |
#define CMU_CTRL_CLKOUTSEL1_HFRCOQ CMU_CTRL_CLKOUTSEL1(6) |
#define CMU_CTRL_CLKOUTSEL1_HFXOQ CMU_CTRL_CLKOUTSEL1(4) |
#define CMU_CTRL_CLKOUTSEL1_LFRCO CMU_CTRL_CLKOUTSEL1(0) |
#define CMU_CTRL_CLKOUTSEL1_LFRCOQ CMU_CTRL_CLKOUTSEL1(5) |
#define CMU_CTRL_CLKOUTSEL1_LFXO CMU_CTRL_CLKOUTSEL1(1) |
#define CMU_CTRL_CLKOUTSEL1_LFXOQ CMU_CTRL_CLKOUTSEL1(3) |
#define CMU_CTRL_CLKOUTSEL1_MASK (0x7 << CMU_CTRL_CLKOUTSEL1_SHIFT) |
#define CMU_CTRL_CLKOUTSEL1_USHFRCO CMU_CTRL_CLKOUTSEL1(8) |
#define CMU_CTRL_HFCLKDIV | ( | v | ) | (((v) << CMU_CTRL_HFCLKDIV_SHIFT) & CMU_CTRL_HFCLKDIV_MASK) |
#define CMU_CTRL_HFCLKDIV_DIV2 CMU_CTRL_HFCLKDIV(1) |
#define CMU_CTRL_HFCLKDIV_DIV3 CMU_CTRL_HFCLKDIV(2) |
#define CMU_CTRL_HFCLKDIV_DIV4 CMU_CTRL_HFCLKDIV(3) |
#define CMU_CTRL_HFCLKDIV_DIV5 CMU_CTRL_HFCLKDIV(4) |
#define CMU_CTRL_HFCLKDIV_DIV6 CMU_CTRL_HFCLKDIV(5) |
#define CMU_CTRL_HFCLKDIV_DIV7 CMU_CTRL_HFCLKDIV(6) |
#define CMU_CTRL_HFCLKDIV_DIV8 CMU_CTRL_HFCLKDIV(7) |
#define CMU_CTRL_HFCLKDIV_MASK (0x7 << CMU_CTRL_HFCLKDIV_SHIFT) |
#define CMU_CTRL_HFCLKDIV_NODIV CMU_CTRL_HFCLKDIV(0) |
#define CMU_CTRL_HFXOBOOST | ( | v | ) | (((v) << CMU_CTRL_HFXOBOOST_SHIFT) & CMU_CTRL_HFXOBOOST_MASK) |
#define CMU_CTRL_HFXOBOOST_100PCENT CMU_CTRL_HFXOBOOST(3) |
#define CMU_CTRL_HFXOBOOST_50PCENT CMU_CTRL_HFXOBOOST(0) |
#define CMU_CTRL_HFXOBOOST_70PCENT CMU_CTRL_HFXOBOOST(1) |
#define CMU_CTRL_HFXOBOOST_80PCENT CMU_CTRL_HFXOBOOST(2) |
#define CMU_CTRL_HFXOBOOST_MASK (0x3 << CMU_CTRL_HFXOBOOST_SHIFT) |
#define CMU_CTRL_HFXOMODE | ( | v | ) | (((v) << CMU_CTRL_HFXOMODE_SHIFT) & CMU_CTRL_HFXOMODE_MASK) |
#define CMU_CTRL_HFXOMODE_BUFEXTCLK CMU_CTRL_HFXOMODE(1) |
#define CMU_CTRL_HFXOMODE_DIGEXTCLK CMU_CTRL_HFXOMODE(2) |
#define CMU_CTRL_HFXOMODE_MASK (0x3 << CMU_CTRL_HFXOMODE_SHIFT) |
#define CMU_CTRL_HFXOMODE_XTAL CMU_CTRL_HFXOMODE(0) |
#define CMU_CTRL_HFXOTIMEOUT | ( | v | ) | (((v) << CMU_CTRL_HFXOTIMEOUT_SHIFT) & CMU_CTRL_HFXOTIMEOUT_MASK) |
#define CMU_CTRL_HFXOTIMEOUT_16KCYCLES CMU_CTRL_HFXOTIMEOUT(3) |
#define CMU_CTRL_HFXOTIMEOUT_1KCYCLES CMU_CTRL_HFXOTIMEOUT(2) |
#define CMU_CTRL_HFXOTIMEOUT_256CYCLES CMU_CTRL_HFXOTIMEOUT(1) |
#define CMU_CTRL_HFXOTIMEOUT_8CYCLES CMU_CTRL_HFXOTIMEOUT(0) |
#define CMU_CTRL_HFXOTIMEOUT_MASK (0x3 << CMU_CTRL_HFXOTIMEOUT_SHIFT) |
#define CMU_CTRL_LFXOMODE | ( | v | ) | (((v) << CMU_CTRL_LFXOMODE_SHIFT) & CMU_CTRL_LFXOMODE_MASK) |
#define CMU_CTRL_LFXOMODE_BUFEXTCLK CMU_CTRL_LFXOMODE(1) |
#define CMU_CTRL_LFXOMODE_DIGEXTCLK CMU_CTRL_LFXOMODE(2) |
#define CMU_CTRL_LFXOMODE_MASK (0x3 << CMU_CTRL_LFXOMODE_SHIFT) |
#define CMU_CTRL_LFXOMODE_XTAL CMU_CTRL_LFXOMODE(0) |
#define CMU_CTRL_LFXOTIMEOUT | ( | v | ) | (((v) << CMU_CTRL_LFXOTIMEOUT_SHIFT) & CMU_CTRL_LFXOTIMEOUT_MASK) |
#define CMU_CTRL_LFXOTIMEOUT_16KCYCLES CMU_CTRL_LFXOTIMEOUT(2) |
#define CMU_CTRL_LFXOTIMEOUT_1KCYCLES CMU_CTRL_LFXOTIMEOUT(1) |
#define CMU_CTRL_LFXOTIMEOUT_32KCYCLES CMU_CTRL_LFXOTIMEOUT(3) |
#define CMU_CTRL_LFXOTIMEOUT_8CYCLES CMU_CTRL_LFXOTIMEOUT(0) |
#define CMU_CTRL_LFXOTIMEOUT_MASK (0x3 << CMU_CTRL_LFXOTIMEOUT_SHIFT) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV | ( | v | ) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_DIV128 CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK128 |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_DIV16 CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK16 |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_DIV2 CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK2 |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_DIV256 CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK256 |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_DIV32 CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK32 |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_DIV4 CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK4 |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_DIV512 CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK512 |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_DIV64 CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK64 |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_DIV8 CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK8 |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK CMU_HFCORECLKDIV_HFCORECLKDIV(0) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK128 CMU_HFCORECLKDIV_HFCORECLKDIV(7) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK16 CMU_HFCORECLKDIV_HFCORECLKDIV(4) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK2 CMU_HFCORECLKDIV_HFCORECLKDIV(1) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK256 CMU_HFCORECLKDIV_HFCORECLKDIV(8) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK32 CMU_HFCORECLKDIV_HFCORECLKDIV(5) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK4 CMU_HFCORECLKDIV_HFCORECLKDIV(2) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK512 CMU_HFCORECLKDIV_HFCORECLKDIV(9) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK64 CMU_HFCORECLKDIV_HFCORECLKDIV(6) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK8 CMU_HFCORECLKDIV_HFCORECLKDIV(3) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_MASK (0xF << CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT) |
#define CMU_HFCORECLKDIV_HFCORECLKDIV_NODIV CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK |
#define CMU_HFPERCLKDIV_HFPERCLKDIV | ( | v | ) |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_DIV128 CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK128 |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_DIV16 CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK16 |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_DIV2 CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK2 |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_DIV256 CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK256 |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_DIV32 CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK32 |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_DIV4 CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK4 |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_DIV512 CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK512 |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_DIV64 CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK64 |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_DIV8 CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK8 |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_MASK (0xF << CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT) |
#define CMU_HFPERCLKDIV_HFPERCLKDIV_NODIV CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK |
#define CMU_HFPERCLKDIV_HFPERCLKHFCLK_HFCLK CMU_HFPERCLKDIV_HFPERCLKDIV(0) |
#define CMU_HFPERCLKDIV_HFPERCLKHFCLK_HFCLK128 CMU_HFPERCLKDIV_HFPERCLKDIV(7) |
#define CMU_HFPERCLKDIV_HFPERCLKHFCLK_HFCLK16 CMU_HFPERCLKDIV_HFPERCLKDIV(4) |
#define CMU_HFPERCLKDIV_HFPERCLKHFCLK_HFCLK2 CMU_HFPERCLKDIV_HFPERCLKDIV(1) |
#define CMU_HFPERCLKDIV_HFPERCLKHFCLK_HFCLK256 CMU_HFPERCLKDIV_HFPERCLKDIV(8) |
#define CMU_HFPERCLKDIV_HFPERCLKHFCLK_HFCLK32 CMU_HFPERCLKDIV_HFPERCLKDIV(5) |
#define CMU_HFPERCLKDIV_HFPERCLKHFCLK_HFCLK4 CMU_HFPERCLKDIV_HFPERCLKDIV(2) |
#define CMU_HFPERCLKDIV_HFPERCLKHFCLK_HFCLK512 CMU_HFPERCLKDIV_HFPERCLKDIV(9) |
#define CMU_HFPERCLKDIV_HFPERCLKHFCLK_HFCLK64 CMU_HFPERCLKDIV_HFPERCLKDIV(6) |
#define CMU_HFPERCLKDIV_HFPERCLKHFCLK_HFCLK8 CMU_HFPERCLKDIV_HFPERCLKDIV(3) |
#define CMU_HFRCOCTRL_BAND | ( | v | ) | (((v) << CMU_HFRCOCTRL_BAND_SHIFT) & CMU_HFRCOCTRL_BAND_MASK) |
#define CMU_HFRCOCTRL_BAND_11MHZ CMU_HFRCOCTRL_BAND(2) |
#define CMU_HFRCOCTRL_BAND_14MHZ CMU_HFRCOCTRL_BAND(3) |
#define CMU_HFRCOCTRL_BAND_1MHZ CMU_HFRCOCTRL_BAND(0) |
#define CMU_HFRCOCTRL_BAND_21MHZ CMU_HFRCOCTRL_BAND(4) |
#define CMU_HFRCOCTRL_BAND_7MHZ CMU_HFRCOCTRL_BAND(1) |
#define CMU_HFRCOCTRL_BAND_MASK (0x7 << CMU_HFRCOCTRL_BAND_SHIFT) |
#define CMU_HFRCOCTRL_SUDELAY | ( | v | ) | ((((v) << CMU_HFRCOCTRL_SUDELAY_SHIFT) & CMU_HFRCOCTRL_SUDELAY_MASK)) |
#define CMU_HFRCOCTRL_SUDELAY_MASK (0x1F << CMU_HFRCOCTRL_SUDELAY_SHIFT) |
#define CMU_HFRCOCTRL_TUNING | ( | v | ) | (((v) << CMU_HFRCOCTRL_TUNING_SHIFT) & CMU_HFRCOCTRL_TUNING_MASK) |
#define CMU_HFRCOCTRL_TUNING_MASK (0xFF << CMU_HFRCOCTRL_TUNING_SHIFT) |
#define CMU_LFAPRESC0_RTC | ( | v | ) | (((v) << CMU_LFAPRESC0_RTC_SHIFT) & CMU_LFAPRESC0_RTC_MASK) |
#define CMU_LFAPRESC0_RTC_DIV1 CMU_LFAPRESC0_RTC(0) |
#define CMU_LFAPRESC0_RTC_DIV1024 CMU_LFAPRESC0_RTC(10) |
#define CMU_LFAPRESC0_RTC_DIV128 CMU_LFAPRESC0_RTC(7) |
#define CMU_LFAPRESC0_RTC_DIV16 CMU_LFAPRESC0_RTC(4) |
#define CMU_LFAPRESC0_RTC_DIV16384 CMU_LFAPRESC0_RTC(14) |
#define CMU_LFAPRESC0_RTC_DIV2 CMU_LFAPRESC0_RTC(1) |
#define CMU_LFAPRESC0_RTC_DIV2048 CMU_LFAPRESC0_RTC(11) |
#define CMU_LFAPRESC0_RTC_DIV256 CMU_LFAPRESC0_RTC(8) |
#define CMU_LFAPRESC0_RTC_DIV32 CMU_LFAPRESC0_RTC(5) |
#define CMU_LFAPRESC0_RTC_DIV32768 CMU_LFAPRESC0_RTC(15) |
#define CMU_LFAPRESC0_RTC_DIV4 CMU_LFAPRESC0_RTC(2) |
#define CMU_LFAPRESC0_RTC_DIV4096 CMU_LFAPRESC0_RTC(12) |
#define CMU_LFAPRESC0_RTC_DIV512 CMU_LFAPRESC0_RTC(9) |
#define CMU_LFAPRESC0_RTC_DIV64 CMU_LFAPRESC0_RTC(6) |
#define CMU_LFAPRESC0_RTC_DIV8 CMU_LFAPRESC0_RTC(3) |
#define CMU_LFAPRESC0_RTC_DIV8192 CMU_LFAPRESC0_RTC(13) |
#define CMU_LFAPRESC0_RTC_MASK (0xF << CMU_LFAPRESC0_RTC_SHIFT) |
#define CMU_LFAPRESC0_RTC_NODIV CMU_LFAPRESC0_RTC_DIV1 |
#define CMU_LFBPRESC0_LEUART0 | ( | v | ) | (((v) << CMU_LFBPRESC0_LEUART0_SHIFT) & CMU_LFBPRESC0_LEUART0_MASK) |
#define CMU_LFBPRESC0_LEUART0_DIV1 CMU_LFBPRESC0_LEUART0(0) |
#define CMU_LFBPRESC0_LEUART0_DIV2 CMU_LFBPRESC0_LEUART0(1) |
#define CMU_LFBPRESC0_LEUART0_DIV4 CMU_LFBPRESC0_LEUART0(2) |
#define CMU_LFBPRESC0_LEUART0_DIV8 CMU_LFBPRESC0_LEUART0(3) |
#define CMU_LFBPRESC0_LEUART0_MASK (0x3 << CMU_LFBPRESC0_LEUART0_SHIFT) |
#define CMU_LFBPRESC0_LEUART0_NODIV CMU_LFBPRESC0_LEUART0_DIV1 |
#define CMU_LFCLKSEL_LFA | ( | v | ) | (((v) << CMU_LFCLKSEL_LFA_SHIFT) & CMU_LFCLKSEL_LFA_MASK) |
#define CMU_LFCLKSEL_LFA_MASK (0x3 << CMU_LFCLKSEL_LFA_SHIFT) |
#define CMU_LFCLKSEL_LFB | ( | v | ) | (((v) << CMU_LFCLKSEL_LFB_SHIFT) & CMU_LFCLKSEL_LFB_MASK) |
#define CMU_LFCLKSEL_LFB_MASK (0x3 << CMU_LFCLKSEL_LFB_SHIFT) |
#define CMU_LFCLKSEL_LFC | ( | v | ) | (((v) << CMU_LFCLKSEL_LFC_SHIFT) & CMU_LFCLKSEL_LFC_MASK) |
#define CMU_LFCLKSEL_LFC_DISABLED CMU_LFCLKSEL_LFC(0) |
#define CMU_LFCLKSEL_LFC_LFRCO CMU_LFCLKSEL_LFC(1) |
#define CMU_LFCLKSEL_LFC_LFXO CMU_LFCLKSEL_LFC(2) |
#define CMU_LFCLKSEL_LFC_MASK (0x3 << CMU_LFCLKSEL_LFC_SHIFT) |
#define CMU_LFRCOCTRL_TUNING | ( | v | ) | (((v) << CMU_LFRCOCTRL_TUNING_SHIFT) & CMU_LFRCOCTRL_TUNING_MASK) |
#define CMU_LFRCOCTRL_TUNING_MASK (0xFF << CMU_LFRCOCTRL_TUNING_SHIFT) |
#define CMU_LOCK_LOCKKEY_LOCK (0x0000 << CMU_LOCK_LOCKKEY_SHIFT) |
#define CMU_LOCK_LOCKKEY_LOCKED (0x0001 << CMU_LOCK_LOCKKEY_SHIFT) |
#define CMU_LOCK_LOCKKEY_MASK (0xFFFF << CMU_LOCK_LOCKKEY_SHIFT) |
#define CMU_LOCK_LOCKKEY_UNLOCK (0x580E << CMU_LOCK_LOCKKEY_SHIFT) |
#define CMU_LOCK_LOCKKEY_UNLOCKED (0x0000 << CMU_LOCK_LOCKKEY_SHIFT) |
#define CMU_ROUTE_LOCATION_LOC0 CMU_ROUTE_LOCATION_LOCx(0) |
#define CMU_ROUTE_LOCATION_LOC1 CMU_ROUTE_LOCATION_LOCx(1) |
#define CMU_ROUTE_LOCATION_LOC2 CMU_ROUTE_LOCATION_LOCx(2) |
#define CMU_ROUTE_LOCATION_LOC3 CMU_ROUTE_LOCATION_LOCx(3) |
#define CMU_ROUTE_LOCATION_LOCx | ( | i | ) | (((i) << CMU_ROUTE_LOCATION_SHIFT) & CMU_ROUTE_LOCATION_MASK) |
#define CMU_ROUTE_LOCATION_MASK (0x7 << CMU_ROUTE_LOCATION_SHIFT) |
enum cmu_osc |
enum cmu_periph_clken |
void cmu_disable_lock | ( | void | ) |
Disable CMU registers lock.
Definition at line 39 of file cmu.c.
References CMU_LOCK, and CMU_LOCK_LOCKKEY_UNLOCK.
void cmu_enable_lock | ( | void | ) |
Enable CMU registers lock.
Definition at line 31 of file cmu.c.
References CMU_LOCK, and CMU_LOCK_LOCKKEY_LOCK.
enum cmu_osc cmu_get_hfclk_source | ( | void | ) |
Get HFCLK clock source.
enum | cmu_osc Oscillator name |
Definition at line 251 of file cmu.c.
References CMU_STATUS, CMU_STATUS_HFRCOSEL, CMU_STATUS_HFXOSEL, CMU_STATUS_LFRCOSEL, CMU_STATUS_LFXOSEL, CMU_STATUS_USHFRCODIV2SEL, HFRCO, HFXO, LFRCO, LFXO, and USHFRCODIV2.
bool cmu_get_lock_flag | ( | void | ) |
Get CMU register lock flag.
true | if flag is set |
false | if flag is not set |
Definition at line 49 of file cmu.c.
References CMU_LOCK, CMU_LOCK_LOCKKEY_LOCKED, and CMU_LOCK_LOCKKEY_MASK.
void cmu_osc_off | ( | enum cmu_osc | osc | ) |
Turn off Oscillator.
[in] | osc | enum cmu_osc Oscillator name |
Definition at line 123 of file cmu.c.
References AUXHFRCO, CMU_OSCENCMD, CMU_OSCENCMD_AUXHFRCODIS, CMU_OSCENCMD_HFRCODIS, CMU_OSCENCMD_HFXODIS, CMU_OSCENCMD_LFRCODIS, CMU_OSCENCMD_LFXODIS, CMU_OSCENCMD_USHFRCODIS, HFRCO, HFXO, LFRCO, LFXO, and USHFRCO.
void cmu_osc_on | ( | enum cmu_osc | osc | ) |
Turn on Oscillator.
[in] | osc | enum cmu_osc Oscillator name |
Definition at line 92 of file cmu.c.
References AUXHFRCO, CMU_OSCENCMD, CMU_OSCENCMD_AUXHFRCOEN, CMU_OSCENCMD_HFRCOEN, CMU_OSCENCMD_HFXOEN, CMU_OSCENCMD_LFRCOEN, CMU_OSCENCMD_LFXOEN, CMU_OSCENCMD_USHFRCOEN, HFRCO, HFXO, LFRCO, LFXO, and USHFRCO.
Referenced by efm32hg_usbd_init().
bool cmu_osc_ready_flag | ( | enum cmu_osc | osc | ) |
Get Oscillator read flag.
[in] | osc | enum cmu_osc Oscillator name |
true | if flag is set |
false | if flag is not set |
Definition at line 156 of file cmu.c.
References AUXHFRCO, CMU_STATUS, CMU_STATUS_AUXHFRCORDY, CMU_STATUS_HFRCORDY, CMU_STATUS_HFXORDY, CMU_STATUS_LFRCORDY, CMU_STATUS_LFXORDY, CMU_STATUS_USHFRCORDY, HFRCO, HFXO, LFRCO, LFXO, and USHFRCO.
void cmu_periph_clock_disable | ( | enum cmu_periph_clken | clken | ) |
void cmu_periph_clock_enable | ( | enum cmu_periph_clken | clken | ) |
Enable Peripheral Clock in running mode.
Enable the clock on particular peripheral.
[in] | clken | Peripheral Name |
For available constants, see enum::cmu_periph_clken (CMU_LEUART1 for example)
Definition at line 68 of file cmu.c.
References _CMU_BIT, and _CMU_REG.
Referenced by efm32hg_usbd_init().
void cmu_set_hfclk_source | ( | enum cmu_osc | osc | ) |
Set HFCLK clock source.
[in] | osc | enum cmu_osc Oscillator name |
Definition at line 223 of file cmu.c.
References CMU_CMD, CMU_CMD_HFCLKSEL_HFRCO, CMU_CMD_HFCLKSEL_HFXO, CMU_CMD_HFCLKSEL_LFRCO, CMU_CMD_HFCLKSEL_LFXO, CMU_CMD_HFCLKSEL_USHFRCODIV2, HFRCO, HFXO, LFRCO, LFXO, and USHFRCODIV2.
void cmu_set_usbclk_source | ( | enum cmu_osc | osc | ) |
Set USBCLK clock source.
osc | Oscillator name |
Definition at line 274 of file cmu.c.
References CMU_CMD, CMU_CMD_USBCCLKSEL_LFRCO, CMU_CMD_USBCCLKSEL_LFXO, CMU_CMD_USBCCLKSEL_USHFRCO, LFRCO, LFXO, and USHFRCO.
Referenced by efm32hg_usbd_init().
void cmu_wait_for_osc_ready | ( | enum cmu_osc | osc | ) |
Wait while oscillator is not ready.
[in] | osc | enum cmu_osc Oscillator name |
Definition at line 189 of file cmu.c.
References AUXHFRCO, CMU_STATUS, CMU_STATUS_AUXHFRCORDY, CMU_STATUS_HFRCORDY, CMU_STATUS_HFXORDY, CMU_STATUS_LFRCORDY, CMU_STATUS_LFXORDY, CMU_STATUS_USHFRCORDY, HFRCO, HFXO, LFRCO, LFXO, and USHFRCO.
Referenced by efm32hg_usbd_init().
void cmu_wait_for_usbclk_selected | ( | enum cmu_osc | osc | ) |
Wait while USBCLK is not selected.
[in] | osc | enum cmu_osc Oscillator name |
Definition at line 296 of file cmu.c.
References CMU_STATUS, CMU_STATUS_USBCLFRCOSEL, CMU_STATUS_USBCLFXOSEL, CMU_STATUS_USBCUSHFRCOSEL, LFRCO, LFXO, and USHFRCO.
Referenced by efm32hg_usbd_init().