libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
prs_common.h
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1/** @addtogroup prs_defines
2 */
3/*
4 * This file is part of the libopencm3 project.
5 *
6 * Copyright (C) 2015 Kuldeep Singh Dhaka <kuldeepdhaka9@gmail.com>
7 *
8 * This library is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU Lesser General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public License
19 * along with this library. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#pragma once
23
26
27/**@{*/
28
29#define PRS_SWPULSE MMIO32(PRS_BASE + 0x000)
30#define PRS_SWLEVEL MMIO32(PRS_BASE + 0x004)
31#define PRS_ROUTE MMIO32(PRS_BASE + 0x008)
32#define PRS_CHx_CTRL(x) MMIO32(PRS_BASE + 0x010 + (0x004 * (x)))
33#define PRS_CH0_CTRL PRS_CHx_CTRL(0)
34#define PRS_CH1_CTRL PRS_CHx_CTRL(1)
35#define PRS_CH2_CTRL PRS_CHx_CTRL(2)
36#define PRS_CH3_CTRL PRS_CHx_CTRL(3)
37#define PRS_CH4_CTRL PRS_CHx_CTRL(4)
38#define PRS_CH5_CTRL PRS_CHx_CTRL(5)
39#define PRS_CH6_CTRL PRS_CHx_CTRL(6)
40#define PRS_CH7_CTRL PRS_CHx_CTRL(71)
41#define PRS_CH8_CTRL PRS_CHx_CTRL(8)
42#define PRS_CH9_CTRL PRS_CHx_CTRL(9)
43#define PRS_CH10_CTRL PRS_CHx_CTRL(10)
44#define PRS_CH11_CTRL PRS_CHx_CTRL(11)
45
46/* PRS_SWPULSE */
47#define PRS_SWPULSE_CHxPULSE(x) (1 << (x))
48#define PRS_SWPULSE_CH0PULSE PRS_SWPULSE_CHxPULSE(0)
49#define PRS_SWPULSE_CH1PULSE PRS_SWPULSE_CHxPULSE(1)
50#define PRS_SWPULSE_CH2PULSE PRS_SWPULSE_CHxPULSE(2)
51#define PRS_SWPULSE_CH3PULSE PRS_SWPULSE_CHxPULSE(3)
52#define PRS_SWPULSE_CH4PULSE PRS_SWPULSE_CHxPULSE(4)
53#define PRS_SWPULSE_CH5PULSE PRS_SWPULSE_CHxPULSE(5)
54#define PRS_SWPULSE_CH6PULSE PRS_SWPULSE_CHxPULSE(6)
55#define PRS_SWPULSE_CH7PULSE PRS_SWPULSE_CHxPULSE(7)
56#define PRS_SWPULSE_CH8PULSE PRS_SWPULSE_CHxPULSE(8)
57#define PRS_SWPULSE_CH9PULSE PRS_SWPULSE_CHxPULSE(9)
58#define PRS_SWPULSE_CH10PULSE PRS_SWPULSE_CHxPULSE(10)
59#define PRS_SWPULSE_CH11PULSE PRS_SWPULSE_CHxPULSE(11)
60
61/* PRS_SWLEVEL */
62#define PRS_SWLEVEL_CHxLEVEL(x) (1 << (x))
63#define PRS_SWLEVEL_CH0LEVEL PRS_SWLEVEL_CHxLEVEL(0)
64#define PRS_SWLEVEL_CH1LEVEL PRS_SWLEVEL_CHxLEVEL(1)
65#define PRS_SWLEVEL_CH2LEVEL PRS_SWLEVEL_CHxLEVEL(2)
66#define PRS_SWLEVEL_CH3LEVEL PRS_SWLEVEL_CHxLEVEL(3)
67#define PRS_SWLEVEL_CH4LEVEL PRS_SWLEVEL_CHxLEVEL(4)
68#define PRS_SWLEVEL_CH5LEVEL PRS_SWLEVEL_CHxLEVEL(5)
69#define PRS_SWLEVEL_CH6LEVEL PRS_SWLEVEL_CHxLEVEL(6)
70#define PRS_SWLEVEL_CH7LEVEL PRS_SWLEVEL_CHxLEVEL(7)
71#define PRS_SWLEVEL_CH8LEVEL PRS_SWLEVEL_CHxLEVEL(8)
72#define PRS_SWLEVEL_CH9LEVEL PRS_SWLEVEL_CHxLEVEL(9)
73#define PRS_SWLEVEL_CH10LEVEL PRS_SWLEVEL_CHxLEVEL(10)
74#define PRS_SWLEVEL_CH11LEVEL PRS_SWLEVEL_CHxLEVEL(11)
75
76/* PRS_ROUTE */
77#define PRS_ROUTE_LOCATION_SHIFT (8)
78#define PRS_ROUTE_LOCATION_MASK (0x7 << PRS_ROUTE_LOCATION_SHIFT)
79#define PRS_ROUTE_LOCATION(v) \
80 (((v) << PRS_ROUTE_LOCATION_SHIFT) & PRS_ROUTE_LOCATION_MASK)
81#define PRS_ROUTE_LOCATION_LOCx(x) PRS_ROUTE_LOCATION(x)
82#define PRS_ROUTE_LOCATION_LOC0 0
83#define PRS_ROUTE_LOCATION_LOC1 1
84
85#define PRS_ROUTE_CHxPEN(x) (1 << (x))
86#define PRS_ROUTE_CH3PEN PRS_ROUTE_CHxPEN(3)
87#define PRS_ROUTE_CH2PEN PRS_ROUTE_CHxPEN(2)
88#define PRS_ROUTE_CH1PEN PRS_ROUTE_CHxPEN(1)
89#define PRS_ROUTE_CH0PEN PRS_ROUTE_CHxPEN(0)
90
91/* PRS_CHx_CTRL */
92#define PRS_CH_CTRL_ASYNC (1 << 28)
93
94#define PRS_CH_CTRL_EDSEL_SHIFT (24)
95#define PRS_CH_CTRL_EDSEL_MASK (0x3 << PRS_CH_CTRL_EDSEL_SHIFT)
96#define PRS_CH_CTRL_EDSEL_OFF (0 << PRS_CH_CTRL_EDSEL_SHIFT)
97#define PRS_CH_CTRL_EDSEL_POSEDGE (1 << PRS_CH_CTRL_EDSEL_SHIFT)
98#define PRS_CH_CTRL_EDSEL_NEGEDGE (2 << PRS_CH_CTRL_EDSEL_SHIFT)
99#define PRS_CH_CTRL_EDSEL_BOTHEDGES (3 << PRS_CH_CTRL_EDSEL_SHIFT)
100
101#define PRS_CH_CTRL_SOURCESEL_SHIFT (16)
102#define PRS_CH_CTRL_SOURCESEL_MASK (0x3F << PRS_CH_CTRL_SOURCESEL_SHIFT)
103#define PRS_CH_CTRL_SOURCESEL(v) \
104 (((v) << PRS_CH_CTRL_SOURCESEL_SHIFT) & PRS_CH_CTRL_SOURCESEL_MASK)
105#define PRS_CH_CTRL_SOURCESEL_NONE 0b000000
106#define PRS_CH_CTRL_SOURCESEL_VCMP 0b000001
107#define PRS_CH_CTRL_SOURCESEL_ACMP0 0b000010
108#define PRS_CH_CTRL_SOURCESEL_ACMP1 0b000011
109#define PRS_CH_CTRL_SOURCESEL_DAC0 0b000110
110#define PRS_CH_CTRL_SOURCESEL_ADC0 0b001000
111#define PRS_CH_CTRL_SOURCESEL_USART0 0b010000
112#define PRS_CH_CTRL_SOURCESEL_USART1 0b010001
113#define PRS_CH_CTRL_SOURCESEL_USART2 0b010010
114#define PRS_CH_CTRL_SOURCESEL_TIMER0 0b011100
115#define PRS_CH_CTRL_SOURCESEL_TIMER1 0b011101
116#define PRS_CH_CTRL_SOURCESEL_TIMER2 0b011110
117#define PRS_CH_CTRL_SOURCESEL_TIMER3 0b011111
118#define PRS_CH_CTRL_SOURCESEL_USB 0b100100
119#define PRS_CH_CTRL_SOURCESEL_RTC 0b101000
120#define PRS_CH_CTRL_SOURCESEL_UART0 0b101001
121#define PRS_CH_CTRL_SOURCESEL_UART1 0b101010
122#define PRS_CH_CTRL_SOURCESEL_GPIOL 0b110000
123#define PRS_CH_CTRL_SOURCESEL_GPIOH 0b110001
124#define PRS_CH_CTRL_SOURCESEL_LETIMER0 0b110100
125#define PRS_CH_CTRL_SOURCESEL_BURTC 0b110111
126#define PRS_CH_CTRL_SOURCESEL_LESENSEL 0b111001
127#define PRS_CH_CTRL_SOURCESEL_LESENSEH 0b111010
128#define PRS_CH_CTRL_SOURCESEL_LESENSED 0b111011
129
130#define PRS_CH_CTRL_SIGSEL_SHIFT (0)
131#define PRS_CH_CTRL_SIGSEL_MASK (0x7 << PRS_CH_CTRL_SIGSEL_SHIFT)
132#define PRS_CH_CTRL_SIGSEL(v) \
133 (((v) << PRS_CH_CTRL_SIGSEL_SHIFT) & PRS_CH_CTRL_SIGSEL_MASK)
134#define PRS_CH_CTRL_SIGSEL_OFF 0
135#define PRS_CH_CTRL_SIGSEL_VCMPOUT 0
136#define PRS_CH_CTRL_SIGSEL_ACMP0OUT 0
137#define PRS_CH_CTRL_SIGSEL_ACMP1OUT 0
138#define PRS_CH_CTRL_SIGSEL_DAC0CH0 0
139#define PRS_CH_CTRL_SIGSEL_DAC0CH1 1
140#define PRS_CH_CTRL_SIGSEL_ADCSINGLE 0
141#define PRS_CH_CTRL_SIGSEL_ADCSCAN 1
142#define PRS_CH_CTRL_SIGSEL_USART0IRTX 0
143#define PRS_CH_CTRL_SIGSEL_USART0TXC 1
144#define PRS_CH_CTRL_SIGSEL_USART0RXDATA 2
145#define PRS_CH_CTRL_SIGSEL_USART1TXC 1
146#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV 2
147#define PRS_CH_CTRL_SIGSEL_USART2TXC 1
148#define PRS_CH_CTRL_SIGSEL_USART2RXDATAV 2
149#define PRS_CH_CTRL_SIGSEL_TIMER0UF 0
150#define PRS_CH_CTRL_SIGSEL_TIMER0OF 1
151#define PRS_CH_CTRL_SIGSEL_TIMER0CC0 2
152#define PRS_CH_CTRL_SIGSEL_TIMER0CC1 3
153#define PRS_CH_CTRL_SIGSEL_TIMER0CC2 4
154#define PRS_CH_CTRL_SIGSEL_TIMER1UF 0
155#define PRS_CH_CTRL_SIGSEL_TIMER1OF 1
156#define PRS_CH_CTRL_SIGSEL_TIMER1CC0 2
157#define PRS_CH_CTRL_SIGSEL_TIMER1CC1 3
158#define PRS_CH_CTRL_SIGSEL_TIMER1CC2 4
159#define PRS_CH_CTRL_SIGSEL_TIMER2UF 0
160#define PRS_CH_CTRL_SIGSEL_TIMER2OF 1
161#define PRS_CH_CTRL_SIGSEL_TIMER2CC0 2
162#define PRS_CH_CTRL_SIGSEL_TIMER2CC1 3
163#define PRS_CH_CTRL_SIGSEL_TIMER2CC2 4
164#define PRS_CH_CTRL_SIGSEL_TIMER3UF 0
165#define PRS_CH_CTRL_SIGSEL_TIMER3OF 1
166#define PRS_CH_CTRL_SIGSEL_TIMER3CC0 2
167#define PRS_CH_CTRL_SIGSEL_TIMER3CC1 3
168#define PRS_CH_CTRL_SIGSEL_TIMER3CC2 4
169#define PRS_CH_CTRL_SIGSEL_USBSOF 0
170#define PRS_CH_CTRL_SIGSEL_USBSOFSR 1
171#define PRS_CH_CTRL_SIGSEL_RTCOF 0
172#define PRS_CH_CTRL_SIGSEL_RTCCOMP0 1
173#define PRS_CH_CTRL_SIGSEL_RTCCOMP1 2
174#define PRS_CH_CTRL_SIGSEL_UART0TXC 1
175#define PRS_CH_CTRL_SIGSEL_UART0RXDATAV 2
176#define PRS_CH_CTRL_SIGSEL_UART1TXC 1
177#define PRS_CH_CTRL_SIGSEL_UART1RXDATAV 2
178#define PRS_CH_CTRL_SIGSEL_GPIOPIN0 0
179#define PRS_CH_CTRL_SIGSEL_GPIOPIN1 1
180#define PRS_CH_CTRL_SIGSEL_GPIOPIN2 2
181#define PRS_CH_CTRL_SIGSEL_GPIOPIN3 3
182#define PRS_CH_CTRL_SIGSEL_GPIOPIN4 4
183#define PRS_CH_CTRL_SIGSEL_GPIOPIN5 5
184#define PRS_CH_CTRL_SIGSEL_GPIOPIN6 6
185#define PRS_CH_CTRL_SIGSEL_GPIOPIN7 7
186#define PRS_CH_CTRL_SIGSEL_GPIOPIN8 0
187#define PRS_CH_CTRL_SIGSEL_GPIOPIN9 1
188#define PRS_CH_CTRL_SIGSEL_GPIOPIN10 2
189#define PRS_CH_CTRL_SIGSEL_GPIOPIN11 3
190#define PRS_CH_CTRL_SIGSEL_GPIOPIN12 4
191#define PRS_CH_CTRL_SIGSEL_GPIOPIN13 5
192#define PRS_CH_CTRL_SIGSEL_GPIOPIN14 6
193#define PRS_CH_CTRL_SIGSEL_GPIOPIN15 7
194#define PRS_CH_CTRL_SIGSEL_LETIMER0CH0 0
195#define PRS_CH_CTRL_SIGSEL_LETIMER0CH1 1
196#define PRS_CH_CTRL_SIGSEL_BURTCOF 0
197#define PRS_CH_CTRL_SIGSEL_BURTCCOMP0 1
198#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 0
199#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 1
200#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 2
201#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 3
202#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 4
203#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 5
204#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 6
205#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 7
206#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 0
207#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 1
208#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 2
209#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 3
210#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 4
211#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 5
212#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 6
213#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 7
214#define PRS_CH_CTRL_SIGSEL_LESENSEDEC0 0
215#define PRS_CH_CTRL_SIGSEL_LESENSEDEC1 1
216#define PRS_CH_CTRL_SIGSEL_LESENSEDEC2 2
217
218/* generic of above */
219#define PRS_CH_CTRL_SIGSEL_VCMP_OUT 0
220#define PRS_CH_CTRL_SIGSEL_ACMP_OUT 0
221#define PRS_CH_CTRL_SIGSEL_DAC_CHx(x) PRS_CH_CTRL_SIGSEL(x)
222#define PRS_CH_CTRL_SIGSEL_DAC_CH0 0
223#define PRS_CH_CTRL_SIGSEL_DAC_CH1 1
224#define PRS_CH_CTRL_SIGSEL_ADC_SINGLE 0
225#define PRS_CH_CTRL_SIGSEL_ADC_SCAN 1
226#define PRS_CH_CTRL_SIGSEL_USART_IRTX 0
227#define PRS_CH_CTRL_SIGSEL_USART_TXC 1
228#define PRS_CH_CTRL_SIGSEL_USART_RXDATAV 2
229#define PRS_CH_CTRL_SIGSEL_TIMER_UF 0
230#define PRS_CH_CTRL_SIGSEL_TIMER_OF 1
231#define PRS_CH_CTRL_SIGSEL_TIMER_CCx(x) PRS_CH_CTRL_SIGSEL((x) + 2)
232#define PRS_CH_CTRL_SIGSEL_TIMER_CC0 PRS_CH_CTRL_SIGSEL_TIMER_CCx(0)
233#define PRS_CH_CTRL_SIGSEL_TIMER_CC1 PRS_CH_CTRL_SIGSEL_TIMER_CCx(1)
234#define PRS_CH_CTRL_SIGSEL_TIMER_CC2 PRS_CH_CTRL_SIGSEL_TIMER_CCx(2)
235#define PRS_CH_CTRL_SIGSEL_USB_SOF 0
236#define PRS_CH_CTRL_SIGSEL_USB_SOFSR 1
237#define PRS_CH_CTRL_SIGSEL_RTC_OF 0
238#define PRS_CH_CTRL_SIGSEL_RTC_COMPx(x) PRS_CH_CTRL_SIGSEL((x) + 1)
239#define PRS_CH_CTRL_SIGSEL_RTC_COMP0 PRS_CH_CTRL_SIGSEL_RTC_COMPx(0)
240#define PRS_CH_CTRL_SIGSEL_RTC_COMP1 PRS_CH_CTRL_SIGSEL_RTC_COMPx(1)
241#define PRS_CH_CTRL_SIGSEL_UART_TXC 1
242#define PRS_CH_CTRL_SIGSEL_UART_RXDATAV 2
243#define PRS_CH_CTRL_SIGSEL_GPIOL_PINx(x) PRS_CH_CTRL_SIGSEL(x)
244#define PRS_CH_CTRL_SIGSEL_GPIO_PIN0 \
245 0
246#define PRS_CH_CTRL_SIGSEL_GPIO_PIN1 \
247 1
248#define PRS_CH_CTRL_SIGSEL_GPIO_PIN2 \
249 2
250#define PRS_CH_CTRL_SIGSEL_GPIO_PIN3 \
251 3
252#define PRS_CH_CTRL_SIGSEL_GPIO_PIN4 \
253 4
254#define PRS_CH_CTRL_SIGSEL_GPIO_PIN5 \
255 5
256#define PRS_CH_CTRL_SIGSEL_GPIO_PIN6 \
257 6
258#define PRS_CH_CTRL_SIGSEL_GPIO_PIN7 \
259 7
260#define PRS_CH_CTRL_SIGSEL_GPIOH_PINx(x) PRS_CH_CTRL_SIGSEL((x) - 8)
261#define PRS_CH_CTRL_SIGSEL_GPIO_PIN8 \
262 PRS_CH_CTRL_SIGSEL_GPIOH_PINx(8)
263#define PRS_CH_CTRL_SIGSEL_GPIO_PIN9 \
264 PRS_CH_CTRL_SIGSEL_GPIOH_PINx(9)
265#define PRS_CH_CTRL_SIGSEL_GPIO_PIN10 \
266 PRS_CH_CTRL_SIGSEL_GPIOH_PINx(10)
267#define PRS_CH_CTRL_SIGSEL_GPIO_PIN11 \
268 PRS_CH_CTRL_SIGSEL_GPIOH_PINx(11)
269#define PRS_CH_CTRL_SIGSEL_GPIO_PIN12 \
270 PRS_CH_CTRL_SIGSEL_GPIOH_PINx(12)
271#define PRS_CH_CTRL_SIGSEL_GPIO_PIN13 \
272 PRS_CH_CTRL_SIGSEL_GPIOH_PINx(13)
273#define PRS_CH_CTRL_SIGSEL_GPIO_PIN14 \
274 PRS_CH_CTRL_SIGSEL_GPIOH_PINx(14)
275#define PRS_CH_CTRL_SIGSEL_GPIO_PIN15 \
276 PRS_CH_CTRL_SIGSEL_GPIOH_PINx(15)
277#define PRS_CH_CTRL_SIGSEL_LETIMER_CHx(x) PRS_CH_CTRL_SIGSEL(x)
278#define PRS_CH_CTRL_SIGSEL_LETIMER_CH0 \
279 0
280#define PRS_CH_CTRL_SIGSEL_LETIMER_CH1 \
281 1
282#define PRS_CH_CTRL_SIGSEL_BURTC_OF 0
283#define PRS_CH_CTRL_SIGSEL_BURTC_COMP0 1
284#define PRS_CH_CTRL_SIGSEL_LESENSEL_SCANRESx(x) PRS_CH_CTRL_SIGSEL(x)
285#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES0 \
286 0
287#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES1 \
288 1
289#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES2 \
290 2
291#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES3 \
292 3
293#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES4 \
294 4
295#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES5 \
296 5
297#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES6 \
298 6
299#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES7 \
300 7
301#define PRS_CH_CTRL_SIGSEL_LESENSEH_SCANRESx(x) \
302 PRS_CH_CTRL_SIGSEL((x) - 8)
303#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES8 \
304 PRS_CH_CTRL_SIGSEL_LESENSEH_SCANRESx(8)
305#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES9 \
306 PRS_CH_CTRL_SIGSEL_LESENSEH_SCANRESx(9)
307#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES10 \
308 PRS_CH_CTRL_SIGSEL_LESENSEH_SCANRESx(10)
309#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES11 \
310 PRS_CH_CTRL_SIGSEL_LESENSEH_SCANRESx(11)
311#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES12 \
312 PRS_CH_CTRL_SIGSEL_LESENSEH_SCANRESx(12)
313#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES13 \
314 PRS_CH_CTRL_SIGSEL_LESENSEH_SCANRESx(13)
315#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES14 \
316 PRS_CH_CTRL_SIGSEL_LESENSEH_SCANRESx(14)
317#define PRS_CH_CTRL_SIGSEL_LESENSE_SCANRES15 \
318 PRS_CH_CTRL_SIGSEL_LESENSEH_SCANRESx(15)
319#define PRS_CH_CTRL_SIGSEL_LESENSED_DECx(x) PRS_CH_CTRL_SIGSEL(x)
320#define PRS_CH_CTRL_SIGSEL_LESENSE_DEC0 \
321 0
322#define PRS_CH_CTRL_SIGSEL_LESENSE_DEC1 \
323 1
324#define PRS_CH_CTRL_SIGSEL_LESENSE_DEC2 \
325 2
326
327/** @defgroup prs_ch PRS Channel Number
328@ingroup prs_defines
329
330@{*/
331enum prs_ch {
345/**@}*/
346
348
349void prs_enable_gpio_output(enum prs_ch ch);
350void prs_disable_gpio_output(enum prs_ch ch);
351void prs_set_output_loc(uint32_t loc);
352
353void prs_software_pulse(enum prs_ch ch);
354void prs_software_level_high(enum prs_ch ch);
355void prs_software_level_low(enum prs_ch ch);
356
357void prs_enable_async(enum prs_ch ch);
358void prs_disable_async(enum prs_ch ch);
359void prs_set_edge(enum prs_ch ch, uint32_t edge);
360void prs_set_source(enum prs_ch ch, uint32_t source);
361void prs_set_signal(enum prs_ch ch, uint32_t sig);
362
364
365/**@}*/
#define END_DECLS
Definition: common.h:34
#define BEGIN_DECLS
Definition: common.h:33
Dispatcher for the base address definitions, depending on the particular Gecko family.
prs_ch
Definition: prs_common.h:331
@ PRS_CH11
Definition: prs_common.h:343
@ PRS_CH0
Definition: prs_common.h:332
@ PRS_CH2
Definition: prs_common.h:334
@ PRS_CH10
Definition: prs_common.h:342
@ PRS_CH6
Definition: prs_common.h:338
@ PRS_CH4
Definition: prs_common.h:336
@ PRS_CH8
Definition: prs_common.h:340
@ PRS_CH7
Definition: prs_common.h:339
@ PRS_CH5
Definition: prs_common.h:337
@ PRS_CH3
Definition: prs_common.h:335
@ PRS_CH1
Definition: prs_common.h:333
@ PRS_CH9
Definition: prs_common.h:341
void prs_disable_async(enum prs_ch ch)
enable synchronization of this channel reflex signal
Definition: prs_common.c:112
void prs_software_pulse(enum prs_ch ch)
Generate software pulse.
Definition: prs_common.c:68
void prs_enable_async(enum prs_ch ch)
disable synchronization of this channel reflex signal
Definition: prs_common.c:102
void prs_set_edge(enum prs_ch ch, uint32_t edge)
Edge detection for the channel.
Definition: prs_common.c:122
void prs_software_level_low(enum prs_ch ch)
LOW is XOR'ed with the corresponding bit in the software-pulse and the PRS input signal to generate.
Definition: prs_common.c:92
void prs_set_source(enum prs_ch ch, uint32_t source)
Source for the channel.
Definition: prs_common.c:133
void prs_enable_gpio_output(enum prs_ch ch)
Enable PRS output to GPIO.
Definition: prs_common.c:36
void prs_set_output_loc(uint32_t loc)
Location of the PRS to be output on GPIO.
Definition: prs_common.c:56
void prs_set_signal(enum prs_ch ch, uint32_t sig)
Source for the channel.
Definition: prs_common.c:145
void prs_disable_gpio_output(enum prs_ch ch)
Disable PRS output to GPIO.
Definition: prs_common.c:46
void prs_software_level_high(enum prs_ch ch)
HIGH is XOR'ed with the corresponding bit in the software-pulse and the PRS input signal to generate.
Definition: prs_common.c:80