libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
efm32/tg/memorymap.h
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1/*
2 * This file is part of the libopencm3 project.
3 *
4 * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
5 *
6 * This library is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU Lesser General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public License
17 * along with this library. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20/** @file
21 *
22 * Layout of the system address space of Tiny Gecko devices.
23 *
24 * This reflects d0034_efm32tg_reference_manual.pdf figure 5.2.
25 */
26
27/* The common cortex-m3 definitions were verified from
28 * d0034_efm32tg_reference_manual.pdf figure 5.2. The CM3 ROM Table seems to be
29 * missing there. The details (everything based on SCS_BASE) was verified from
30 * d0002_efm32_cortex-m3_reference_manual.pdf table 4.1, and seems to fit, but
31 * there are discrepancies. */
32#include <libopencm3/cm3/memorymap.h>
33
34#define CODE_BASE (0x00000000U)
35
36#define SRAM_BASE (0x20000000U)
37#define SRAM_BASE_BITBAND (0x22000000U)
38
39#define PERIPH_BASE (0x40000000U)
40#define PERIPH_BASE_BITBAND (0x42000000U)
41
42/* Details of the "Code" section */
43
44#define FLASH_BASE (CODE_BASE + 0x00000000)
45#define USERDATA_BASE (CODE_BASE + 0x0fe00000)
46#define LOCKBITS_BASE (CODE_BASE + 0x0fe04000)
47#define CHIPCONFIG_BASE (CODE_BASE + 0x0fe08000)
48#define CODESPACESRAM_BASE (CODE_BASE + 0x10000000)
49
50/* Tiny Gecko peripherial definitions */
51
52#define VCMP_BASE (PERIPH_BASE + 0x00000000)
53#define ACMP0_BASE (PERIPH_BASE + 0x00001000)
54#define ACMP1_BASE (PERIPH_BASE + 0x00001400)
55#define ADC_BASE (PERIPH_BASE + 0x00002000)
56#define DAC0_BASE (PERIPH_BASE + 0x00004000)
57#define GPIO_BASE (PERIPH_BASE + 0x00006000) /**< @see gpio.h */
58#define I2C0_BASE (PERIPH_BASE + 0x0000a000)
59#define USART0_BASE (PERIPH_BASE + 0x0000c000)
60#define USART1_BASE (PERIPH_BASE + 0x0000c400)
61#define TIMER0_BASE (PERIPH_BASE + 0x00010000)
62#define TIMER1_BASE (PERIPH_BASE + 0x00010400)
63#define RTC_BASE (PERIPH_BASE + 0x00080000)
64#define LETIMER0_BASE (PERIPH_BASE + 0x00082000)
65#define LEUART0_BASE (PERIPH_BASE + 0x00084000)
66#define PCNT0_BASE (PERIPH_BASE + 0x00086000)
67#define WDOG_BASE (PERIPH_BASE + 0x00088000)
68#define LCD_BASE (PERIPH_BASE + 0x0008a000)
69#define LESENSE_BASE (PERIPH_BASE + 0x0008c000)
70#define MSC_BASE (PERIPH_BASE + 0x000c0000)
71#define DMA_BASE (PERIPH_BASE + 0x000c2000)
72#define EMU_BASE (PERIPH_BASE + 0x000c6000)
73#define CMU_BASE (PERIPH_BASE + 0x000c8000) /**< @see cmu.h */
74#define RMU_BASE (PERIPH_BASE + 0x000ca000)
75#define PRS_BASE (PERIPH_BASE + 0x000cc000)
76#define AES_BASE (PERIPH_BASE + 0x000e0000)