Layout of the system address space of Tiny Gecko devices. More...

#include <libopencm3/cm3/memorymap.h>

Include dependency graph for efm32/tg/memorymap.h:

Macros
#define	CODE_BASE (0x00000000U)

#define	SRAM_BASE (0x20000000U)

#define	SRAM_BASE_BITBAND (0x22000000U)

#define	PERIPH_BASE (0x40000000U)

#define	PERIPH_BASE_BITBAND (0x42000000U)

#define	FLASH_BASE (CODE_BASE + 0x00000000)

#define	USERDATA_BASE (CODE_BASE + 0x0fe00000)

#define	LOCKBITS_BASE (CODE_BASE + 0x0fe04000)

#define	CHIPCONFIG_BASE (CODE_BASE + 0x0fe08000)

#define	CODESPACESRAM_BASE (CODE_BASE + 0x10000000)

#define	VCMP_BASE (PERIPH_BASE + 0x00000000)

#define	ACMP0_BASE (PERIPH_BASE + 0x00001000)

#define	ACMP1_BASE (PERIPH_BASE + 0x00001400)

#define	ADC_BASE (PERIPH_BASE + 0x00002000)

#define	DAC0_BASE (PERIPH_BASE + 0x00004000)

#define	GPIO_BASE (PERIPH_BASE + 0x00006000)

#define	I2C0_BASE (PERIPH_BASE + 0x0000a000)

#define	USART0_BASE (PERIPH_BASE + 0x0000c000)

#define	USART1_BASE (PERIPH_BASE + 0x0000c400)

#define	TIMER0_BASE (PERIPH_BASE + 0x00010000)

#define	TIMER1_BASE (PERIPH_BASE + 0x00010400)

#define	RTC_BASE (PERIPH_BASE + 0x00080000)

#define	LETIMER0_BASE (PERIPH_BASE + 0x00082000)

#define	LEUART0_BASE (PERIPH_BASE + 0x00084000)

#define	PCNT0_BASE (PERIPH_BASE + 0x00086000)

#define	WDOG_BASE (PERIPH_BASE + 0x00088000)

#define	LCD_BASE (PERIPH_BASE + 0x0008a000)

#define	LESENSE_BASE (PERIPH_BASE + 0x0008c000)

#define	MSC_BASE (PERIPH_BASE + 0x000c0000)

#define	DMA_BASE (PERIPH_BASE + 0x000c2000)

#define	EMU_BASE (PERIPH_BASE + 0x000c6000)

#define	CMU_BASE (PERIPH_BASE + 0x000c8000)

#define	RMU_BASE (PERIPH_BASE + 0x000ca000)

#define	PRS_BASE (PERIPH_BASE + 0x000cc000)

#define	AES_BASE (PERIPH_BASE + 0x000e0000)

Detailed Description

Layout of the system address space of Tiny Gecko devices.

This reflects d0034_efm32tg_reference_manual.pdf figure 5.2.

Definition in file efm32/tg/memorymap.h.

Macro Definition Documentation

◆ ACMP0_BASE

#define ACMP0_BASE (PERIPH_BASE + 0x00001000)

Definition at line 53 of file efm32/tg/memorymap.h.

◆ ACMP1_BASE

#define ACMP1_BASE (PERIPH_BASE + 0x00001400)

Definition at line 54 of file efm32/tg/memorymap.h.

◆ ADC_BASE

#define ADC_BASE (PERIPH_BASE + 0x00002000)

Definition at line 55 of file efm32/tg/memorymap.h.

◆ AES_BASE

#define AES_BASE (PERIPH_BASE + 0x000e0000)

Definition at line 76 of file efm32/tg/memorymap.h.

◆ CHIPCONFIG_BASE

#define CHIPCONFIG_BASE (CODE_BASE + 0x0fe08000)

Definition at line 47 of file efm32/tg/memorymap.h.

◆ CMU_BASE

#define CMU_BASE (PERIPH_BASE + 0x000c8000)

See also: cmu.h

Definition at line 73 of file efm32/tg/memorymap.h.

◆ CODE_BASE

#define CODE_BASE (0x00000000U)

Definition at line 34 of file efm32/tg/memorymap.h.

◆ CODESPACESRAM_BASE

#define CODESPACESRAM_BASE (CODE_BASE + 0x10000000)

Definition at line 48 of file efm32/tg/memorymap.h.

◆ DAC0_BASE

#define DAC0_BASE (PERIPH_BASE + 0x00004000)

Definition at line 56 of file efm32/tg/memorymap.h.

◆ DMA_BASE

#define DMA_BASE (PERIPH_BASE + 0x000c2000)

Definition at line 71 of file efm32/tg/memorymap.h.

◆ EMU_BASE

#define EMU_BASE (PERIPH_BASE + 0x000c6000)

Definition at line 72 of file efm32/tg/memorymap.h.

◆ FLASH_BASE

#define FLASH_BASE (CODE_BASE + 0x00000000)

Definition at line 44 of file efm32/tg/memorymap.h.

◆ GPIO_BASE

#define GPIO_BASE (PERIPH_BASE + 0x00006000)

See also: gpio.h

Definition at line 57 of file efm32/tg/memorymap.h.

◆ I2C0_BASE

#define I2C0_BASE (PERIPH_BASE + 0x0000a000)

Definition at line 58 of file efm32/tg/memorymap.h.

◆ LCD_BASE

#define LCD_BASE (PERIPH_BASE + 0x0008a000)

Definition at line 68 of file efm32/tg/memorymap.h.

◆ LESENSE_BASE

#define LESENSE_BASE (PERIPH_BASE + 0x0008c000)

Definition at line 69 of file efm32/tg/memorymap.h.

◆ LETIMER0_BASE

#define LETIMER0_BASE (PERIPH_BASE + 0x00082000)

Definition at line 64 of file efm32/tg/memorymap.h.

◆ LEUART0_BASE

#define LEUART0_BASE (PERIPH_BASE + 0x00084000)

Definition at line 65 of file efm32/tg/memorymap.h.

◆ LOCKBITS_BASE

#define LOCKBITS_BASE (CODE_BASE + 0x0fe04000)

Definition at line 46 of file efm32/tg/memorymap.h.

◆ MSC_BASE

#define MSC_BASE (PERIPH_BASE + 0x000c0000)

Definition at line 70 of file efm32/tg/memorymap.h.

◆ PCNT0_BASE

#define PCNT0_BASE (PERIPH_BASE + 0x00086000)

Definition at line 66 of file efm32/tg/memorymap.h.

◆ PERIPH_BASE

#define PERIPH_BASE (0x40000000U)

Definition at line 39 of file efm32/tg/memorymap.h.

◆ PERIPH_BASE_BITBAND

#define PERIPH_BASE_BITBAND (0x42000000U)

Definition at line 40 of file efm32/tg/memorymap.h.

◆ PRS_BASE

#define PRS_BASE (PERIPH_BASE + 0x000cc000)

Definition at line 75 of file efm32/tg/memorymap.h.

◆ RMU_BASE

#define RMU_BASE (PERIPH_BASE + 0x000ca000)

Definition at line 74 of file efm32/tg/memorymap.h.

◆ RTC_BASE

#define RTC_BASE (PERIPH_BASE + 0x00080000)

Definition at line 63 of file efm32/tg/memorymap.h.

◆ SRAM_BASE

#define SRAM_BASE (0x20000000U)

Definition at line 36 of file efm32/tg/memorymap.h.

◆ SRAM_BASE_BITBAND

#define SRAM_BASE_BITBAND (0x22000000U)

Definition at line 37 of file efm32/tg/memorymap.h.

◆ TIMER0_BASE

#define TIMER0_BASE (PERIPH_BASE + 0x00010000)

Definition at line 61 of file efm32/tg/memorymap.h.

◆ TIMER1_BASE

#define TIMER1_BASE (PERIPH_BASE + 0x00010400)

Definition at line 62 of file efm32/tg/memorymap.h.

◆ USART0_BASE

#define USART0_BASE (PERIPH_BASE + 0x0000c000)

Definition at line 59 of file efm32/tg/memorymap.h.

◆ USART1_BASE

#define USART1_BASE (PERIPH_BASE + 0x0000c400)

Definition at line 60 of file efm32/tg/memorymap.h.

◆ USERDATA_BASE

#define USERDATA_BASE (CODE_BASE + 0x0fe00000)

Definition at line 45 of file efm32/tg/memorymap.h.

◆ VCMP_BASE

#define VCMP_BASE (PERIPH_BASE + 0x00000000)

Definition at line 52 of file efm32/tg/memorymap.h.

◆ WDOG_BASE

#define WDOG_BASE (PERIPH_BASE + 0x00088000)

Definition at line 67 of file efm32/tg/memorymap.h.

Macros