libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
rcc_common_all.h
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1/** @addtogroup rcc_defines
2 *
3 * @author @htmlonly © @endhtmlonly 2013
4 * Frantisek Burian <BuFran@seznam.cz>
5 */
6/*
7 * This file is part of the libopencm3 project.
8 *
9 * Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
10 *
11 * This library is free software: you can redistribute it and/or modify
12 * it under the terms of the GNU Lesser General Public License as published by
13 * the Free Software Foundation, either version 3 of the License, or
14 * (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU Lesser General Public License for more details.
20 *
21 * You should have received a copy of the GNU Lesser General Public License
22 * along with this library. If not, see <http://www.gnu.org/licenses/>.
23 */
24
25/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA RCC.H
26 * The order of header inclusion is important. rcc.h defines the device
27 * specific enumerations before including this header file.
28 */
29
30/** @cond */
31#ifdef LIBOPENCM3_RCC_H
32/** @endcond */
33
34#ifndef LIBOPENCM3_RCC_COMMON_ALL_H
35#define LIBOPENCM3_RCC_COMMON_ALL_H
36
37/**@{*/
38
40
41void rcc_peripheral_enable_clock(volatile uint32_t *reg, uint32_t en);
42void rcc_peripheral_disable_clock(volatile uint32_t *reg, uint32_t en);
43void rcc_peripheral_reset(volatile uint32_t *reg, uint32_t reset);
44void rcc_peripheral_clear_reset(volatile uint32_t *reg, uint32_t clear_reset);
45
51
52void rcc_set_mco(uint32_t mcosrc);
53void rcc_osc_bypass_enable(enum rcc_osc osc);
54void rcc_osc_bypass_disable(enum rcc_osc osc);
55
56/**
57 * Is the given oscillator ready?
58 * @param osc Oscillator ID
59 * @return true if the hardware indicates the oscillator is ready.
60 */
62
63/**
64 * Wait for Oscillator Ready.
65 * Block until the hardware indicates that the Oscillator is ready.
66 * @param osc Oscillator ID
67 */
68void rcc_wait_for_osc_ready(enum rcc_osc osc);
69
70/**
71 * This will return the divisor 1/2/4/8/16/64/128/256/512 which is set as a
72 * 4-bit value, typically used for hpre and other prescalers.
73 * @param div_val Masked and shifted divider value from register (e.g. RCC_CFGR)
74 */
75uint16_t rcc_get_div_from_hpre(uint8_t div_val);
76
78/**@}*/
79
80#endif
81/** @cond */
82#else
83#warning "rcc_common_all.h should not be included explicitly, only via rcc.h"
84#endif
85/** @endcond */
86
#define END_DECLS
Definition: common.h:34
#define BEGIN_DECLS
Definition: common.h:33
void rcc_periph_reset_release(enum rcc_periph_rst rst)
Reset Peripheral, release.
void rcc_wait_for_osc_ready(enum rcc_osc osc)
Wait for Oscillator Ready.
Definition: rcc.c:244
bool rcc_is_osc_ready(enum rcc_osc osc)
Is the given oscillator ready?
void rcc_peripheral_reset(volatile uint32_t *reg, uint32_t reset)
RCC Reset Peripherals.
void rcc_osc_bypass_enable(enum rcc_osc osc)
RCC Enable Bypass.
rcc_periph_rst
rcc_periph_clken
void rcc_osc_bypass_disable(enum rcc_osc osc)
RCC Disable Bypass.
rcc_osc
void rcc_periph_reset_hold(enum rcc_periph_rst rst)
Reset Peripheral, hold.
void rcc_periph_clock_disable(enum rcc_periph_clken clken)
Disable Peripheral Clock in running mode.
void rcc_periph_clock_enable(enum rcc_periph_clken clken)
Enable Peripheral Clock in running mode.
void rcc_peripheral_enable_clock(volatile uint32_t *reg, uint32_t en)
RCC Enable Peripheral Clocks.
void rcc_peripheral_clear_reset(volatile uint32_t *reg, uint32_t clear_reset)
RCC Remove Reset on Peripherals.
void rcc_set_mco(uint32_t mcosrc)
Select the source of Microcontroller Clock Output.
void rcc_periph_reset_pulse(enum rcc_periph_rst rst)
Reset Peripheral, pulsed.
void rcc_peripheral_disable_clock(volatile uint32_t *reg, uint32_t en)
RCC Disable Peripheral Clocks.
uint16_t rcc_get_div_from_hpre(uint8_t div_val)
This will return the divisor 1/2/4/8/16/64/128/256/512 which is set as a 4-bit value,...