libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
i2c.h
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1/** @defgroup i2c_defines I2C Defines
2
3@brief <b>Defined Constants and Types for the LPC43xx I2C</b>
4
5@ingroup LPC43xx_defines
6
7@version 1.0.0
8
9@author @htmlonly &copy; @endhtmlonly 2012 Michael Ossmann <mike@ossmann.com>
10
11@date 10 March 2013
12
13LGPL License Terms @ref lgpl_license
14 */
15/*
16 * This file is part of the libopencm3 project.
17 *
18 * Copyright (C) 2012 Michael Ossmann <mike@ossmann.com>
19 *
20 * This library is free software: you can redistribute it and/or modify
21 * it under the terms of the GNU Lesser General Public License as published by
22 * the Free Software Foundation, either version 3 of the License, or
23 * (at your option) any later version.
24 *
25 * This library is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU Lesser General Public License for more details.
29 *
30 * You should have received a copy of the GNU Lesser General Public License
31 * along with this library. If not, see <http://www.gnu.org/licenses/>.
32 */
33
34#ifndef LPC43XX_I2C_H
35#define LPC43XX_I2C_H
36
37/**@{*/
38
39#include <libopencm3/cm3/common.h>
40#include <libopencm3/lpc43xx/memorymap.h>
41
42/* --- Convenience macros -------------------------------------------------- */
43
44/* I2C port base addresses (for convenience) */
45#define I2C0 I2C0_BASE
46#define I2C1 I2C1_BASE
47
48/* --- I2C registers ------------------------------------------------------- */
49
50/* I2C Control Set Register */
51#define I2C_CONSET(port) MMIO32((port) + 0x000)
52#define I2C0_CONSET I2C_CONSET(I2C0)
53#define I2C1_CONSET I2C_CONSET(I2C1)
54
55/* I2C Status Register */
56#define I2C_STAT(port) MMIO32((port) + 0x004)
57#define I2C0_STAT I2C_STAT(I2C0)
58#define I2C1_STAT I2C_STAT(I2C1)
59
60/* I2C Data Register */
61#define I2C_DAT(port) MMIO32((port) + 0x008)
62#define I2C0_DAT I2C_DAT(I2C0)
63#define I2C1_DAT I2C_DAT(I2C1)
64
65/* I2C Slave Address Register 0 */
66#define I2C_ADR0(port) MMIO32((port) + 0x00C)
67#define I2C0_ADR0 I2C_ADR0(I2C0)
68#define I2C1_ADR0 I2C_ADR0(I2C1)
69
70/* SCH Duty Cycle Register High Half Word */
71#define I2C_SCLH(port) MMIO32((port) + 0x010)
72#define I2C0_SCLH I2C_SCLH(I2C0)
73#define I2C1_SCLH I2C_SCLH(I2C1)
74
75/* SCL Duty Cycle Register Low Half Word */
76#define I2C_SCLL(port) MMIO32((port) + 0x014)
77#define I2C0_SCLL I2C_SCLL(I2C0)
78#define I2C1_SCLL I2C_SCLL(I2C1)
79
80/* I2C Control Clear Register */
81#define I2C_CONCLR(port) MMIO32((port) + 0x018)
82#define I2C0_CONCLR I2C_CONCLR(I2C0)
83#define I2C1_CONCLR I2C_CONCLR(I2C1)
84
85/* Monitor mode control register */
86#define I2C_MMCTRL(port) MMIO32((port) + 0x01C)
87#define I2C0_MMCTRL I2C_MMCTRL(I2C0)
88#define I2C1_MMCTRL I2C_MMCTRL(I2C1)
89
90/* I2C Slave Address Register 1 */
91#define I2C_ADR1(port) MMIO32((port) + 0x020)
92#define I2C0_ADR1 I2C_ADR1(I2C0)
93#define I2C1_ADR1 I2C_ADR1(I2C1)
94
95/* I2C Slave Address Register 2 */
96#define I2C_ADR2(port) MMIO32((port) + 0x024)
97#define I2C0_ADR2 I2C_ADR2(I2C0)
98#define I2C1_ADR2 I2C_ADR2(I2C1)
99
100/* I2C Slave Address Register 3 */
101#define I2C_ADR3(port) MMIO32((port) + 0x028)
102#define I2C0_ADR3 I2C_ADR3(I2C0)
103#define I2C1_ADR3 I2C_ADR3(I2C1)
104
105/* Data buffer register */
106#define I2C_DATA_BUFFER(port) MMIO32((port) + 0x02C)
107#define I2C0_DATA_BUFFER I2C_DATA_BUFFER(I2C0)
108#define I2C1_DATA_BUFFER I2C_DATA_BUFFER(I2C1)
109
110/* I2C Slave address mask register 0 */
111#define I2C_MASK0(port) MMIO32((port) + 0x030)
112#define I2C0_MASK0 I2C_MASK0(I2C0)
113#define I2C1_MASK0 I2C_MASK0(I2C1)
114
115/* I2C Slave address mask register 1 */
116#define I2C_MASK1(port) MMIO32((port) + 0x034)
117#define I2C0_MASK1 I2C_MASK1(I2C0)
118#define I2C1_MASK1 I2C_MASK1(I2C1)
119
120/* I2C Slave address mask register 2 */
121#define I2C_MASK2(port) MMIO32((port) + 0x038)
122#define I2C0_MASK2 I2C_MASK2(I2C0)
123#define I2C1_MASK2 I2C_MASK2(I2C1)
124
125/* I2C Slave address mask register 3 */
126#define I2C_MASK3(port) MMIO32((port) + 0x03C)
127#define I2C0_MASK3 I2C_MASK3(I2C0)
128#define I2C1_MASK3 I2C_MASK3(I2C1)
129
130/* --- I2Cx_CONCLR values -------------------------------------------------- */
131
132#define I2C_CONCLR_AAC (1 << 2) /* Assert acknowledge Clear */
133#define I2C_CONCLR_SIC (1 << 3) /* I2C interrupt Clear */
134#define I2C_CONCLR_STAC (1 << 5) /* START flag Clear */
135#define I2C_CONCLR_I2ENC (1 << 6) /* I2C interface Disable bit */
136
137/* --- I2Cx_CONSET values -------------------------------------------------- */
138
139#define I2C_CONSET_AA (1 << 2) /* Assert acknowledge flag */
140#define I2C_CONSET_SI (1 << 3) /* I2C interrupt flag */
141#define I2C_CONSET_STO (1 << 4) /* STOP flag */
142#define I2C_CONSET_STA (1 << 5) /* START flag */
143#define I2C_CONSET_I2EN (1 << 6) /* I2C interface enable */
144
145/* --- I2C const definitions ----------------------------------------------- */
146
147#define I2C_WRITE 0
148#define I2C_READ 1
149
150/* --- I2C function prototypes --------------------------------------------- */
151
152BEGIN_DECLS
153
154void i2c0_init(const uint16_t duty_cycle_count);
155void i2c0_tx_start(void);
156void i2c0_tx_byte(uint8_t byte);
157uint8_t i2c0_rx_byte(void);
158void i2c0_stop(void);
159
160END_DECLS
161
162/**@}*/
163
164#endif
END_DECLS
#define END_DECLS
Definition: common.h:34
BEGIN_DECLS
#define BEGIN_DECLS
Definition: common.h:33
i2c0_rx_byte
uint8_t i2c0_rx_byte(void)
i2c0_tx_byte
void i2c0_tx_byte(uint8_t byte)
i2c0_tx_start
void i2c0_tx_start(void)
i2c0_stop
void i2c0_stop(void)
i2c0_init
void i2c0_init(const uint16_t duty_cycle_count)