Clock Config and System Defines
Clock Control and System Defines for the Qorvo PAC55xx series of microcontrollers. More...
Collaboration diagram for Clock Config and System Defines:
Modules | |
| CCS Frequencies | |
| Clock Control Register | |
| CCS PLL Control Register | |
| Ring Oscillator Trim Control Register | |
| Port Pinmux Register Base. | |
| Port Pin Config Addresses. | |
| PMUXSEL register mapping. | |
| Port Pin Mux Select Registers. | |
| PUEN PDEN register mapping. | |
| Port Pull-Up/Down Enable Registers. | |
| DSR register mapping. | |
| Port Drive Strength Enable Registers. | |
Detailed Description
Clock Control and System Defines for the Qorvo PAC55xx series of microcontrollers.
- Date
- 1 Dec 2019
Definitions in this file come from the PAC55XX Family User Guide Rev 1.21 by Active-Semi dated August 26, 2019.
