libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
Collaboration diagram for CCS PLL Control Register:

Macros

#define CCSPLLCTL   MMIO32(SCC_BASE + 0x04)
 
#define CCS_PLLCTL_PLLEN   BIT0
 PLL Enable. More...
 
#define CCS_PLLCTL_PLLBP   BIT1
 PLL Bypass. More...
 
#define CCS_PLLCTL_PLLOUTDIV_MASK   (0x03)
 
#define CCS_PLLCTL_PLLOUTDIV_SHIFT   (2)
 
#define CCS_PLLCTL_PLLOUTDIV(div)   (((div) & CCS_PLLCTL_PLLOUTDIV_MASK) << CCS_PLLCTL_PLLOUTDIV_SHIFT)
 PLL Output Divisor. More...
 
#define CCS_PLLCTL_PLLOUTDIV1   (0)
 
#define CCS_PLLCTL_PLLOUTDIV2   (1)
 
#define CCS_PLLCTL_PLLOUTDIV4   (2)
 
#define CCS_PLLCTL_PLLOUTDIV8   (3)
 
#define CCS_PLLCTL_PLLINDIV_MASK   (0x0F)
 
#define CCS_PLLCTL_PLLINDIV_SHIFT   (4)
 
#define CCS_PLLCTL_PLLINDIV(div)   (((div) & CCS_PLLCTL_PLLINDIV_MASK) << CCS_PLLCTL_PLLINDIV_SHIFT)
 PLL Input Divisor. More...
 
#define CCS_PLLCTL_PLLFBDIV_MASK   (0x3FFF)
 
#define CCS_PLLCTL_PLLFBDIV_SHIFT   (8)
 
#define CCS_PLLCTL_PLLFBDIV(div)   (((div) & CCS_PLLCTL_PLLFBDIV_MASK) << CCS_PLLCTL_PLLFBDIV_SHIFT)
 PLL Feedback Divisor. More...
 
#define CCS_PLLCTL_PLLLOCK   BIT24
 PLL Lock. More...
 

Detailed Description

Macro Definition Documentation

◆ CCS_PLLCTL_PLLBP

#define CCS_PLLCTL_PLLBP   BIT1

PLL Bypass.

Definition at line 95 of file ccs.h.

◆ CCS_PLLCTL_PLLEN

#define CCS_PLLCTL_PLLEN   BIT0

PLL Enable.

Definition at line 93 of file ccs.h.

◆ CCS_PLLCTL_PLLFBDIV

#define CCS_PLLCTL_PLLFBDIV (   div)    (((div) & CCS_PLLCTL_PLLFBDIV_MASK) << CCS_PLLCTL_PLLFBDIV_SHIFT)

PLL Feedback Divisor.

Definition at line 111 of file ccs.h.

◆ CCS_PLLCTL_PLLFBDIV_MASK

#define CCS_PLLCTL_PLLFBDIV_MASK   (0x3FFF)

Definition at line 108 of file ccs.h.

◆ CCS_PLLCTL_PLLFBDIV_SHIFT

#define CCS_PLLCTL_PLLFBDIV_SHIFT   (8)

Definition at line 109 of file ccs.h.

◆ CCS_PLLCTL_PLLINDIV

#define CCS_PLLCTL_PLLINDIV (   div)    (((div) & CCS_PLLCTL_PLLINDIV_MASK) << CCS_PLLCTL_PLLINDIV_SHIFT)

PLL Input Divisor.

Definition at line 107 of file ccs.h.

◆ CCS_PLLCTL_PLLINDIV_MASK

#define CCS_PLLCTL_PLLINDIV_MASK   (0x0F)

Definition at line 104 of file ccs.h.

◆ CCS_PLLCTL_PLLINDIV_SHIFT

#define CCS_PLLCTL_PLLINDIV_SHIFT   (4)

Definition at line 105 of file ccs.h.

◆ CCS_PLLCTL_PLLLOCK

#define CCS_PLLCTL_PLLLOCK   BIT24

PLL Lock.

Definition at line 113 of file ccs.h.

◆ CCS_PLLCTL_PLLOUTDIV

#define CCS_PLLCTL_PLLOUTDIV (   div)    (((div) & CCS_PLLCTL_PLLOUTDIV_MASK) << CCS_PLLCTL_PLLOUTDIV_SHIFT)

PLL Output Divisor.

Definition at line 99 of file ccs.h.

◆ CCS_PLLCTL_PLLOUTDIV1

#define CCS_PLLCTL_PLLOUTDIV1   (0)

Definition at line 100 of file ccs.h.

◆ CCS_PLLCTL_PLLOUTDIV2

#define CCS_PLLCTL_PLLOUTDIV2   (1)

Definition at line 101 of file ccs.h.

◆ CCS_PLLCTL_PLLOUTDIV4

#define CCS_PLLCTL_PLLOUTDIV4   (2)

Definition at line 102 of file ccs.h.

◆ CCS_PLLCTL_PLLOUTDIV8

#define CCS_PLLCTL_PLLOUTDIV8   (3)

Definition at line 103 of file ccs.h.

◆ CCS_PLLCTL_PLLOUTDIV_MASK

#define CCS_PLLCTL_PLLOUTDIV_MASK   (0x03)

Definition at line 96 of file ccs.h.

◆ CCS_PLLCTL_PLLOUTDIV_SHIFT

#define CCS_PLLCTL_PLLOUTDIV_SHIFT   (2)

Definition at line 97 of file ccs.h.

◆ CCSPLLCTL

#define CCSPLLCTL   MMIO32(SCC_BASE + 0x04)

Definition at line 91 of file ccs.h.