PAC55xxxx USART Driver More...

Collaboration diagram for USART peripheral API:

Functions
uint32_t	usart_set_baudrate (uint32_t usart, uint32_t baud)
	USART Set Baudrate The baud rate is computed assuming a peripheral clock of 150MHz. More...

void	usart_configure_lcr (uint32_t usart, uint8_t data_bits, uint8_t stop_bits, uint8_t parity)
	USART Configure Line Control Register This register sets the data bits, stop bits, and parity. More...

void	usart_break_enable (uint32_t usart)
	Enable Break Control Enables break control bit that forces TX pin to logic low. More...

void	usart_break_disable (uint32_t usart)
	Disable Break Control Disables break control bit that forces TX pin to logic low. More...

void	usart_enhanced_enable (uint32_t usart)
	Enable Enhanced Mode Enable enhanced mode to generate interrupts when FIFO thresholds in FCR are reached. More...

void	usart_enhanced_disable (uint32_t usart)
	Disable Enhanced Mode Disable enhanced mode to generate interrupts when FIFO thresholds in FCR are reached. More...

void	usart_fifo_enable (uint32_t usart)
	Enable FIFOs Enable both TX and RX FIFOs. More...

void	usart_fifo_disable (uint32_t usart)
	Disable FIFOs Disable both TX and RX FIFOs. More...

void	usart_set_fifo_depth (uint32_t usart, uint8_t tx_depth, uint8_t rx_depth)
	Set the TX and RX FIFO depth. More...

void	usart_send (uint32_t usart, uint8_t data)
	Write byte to TX FIFO. More...

uint8_t	usart_recv (uint32_t usart)
	Read byte from the RX FIFO. More...

void	usart_enable_rx_interrupt (uint32_t usart)
	Enable RX Interrupts Enable both the Receive Data Available and Character Timeout interrupts. More...

void	usart_disable_rx_interrupt (uint32_t usart)
	Disable RX Interrupts Disable both the Receive Data Available and Character Timeout interrupts. More...

void	usart_enable_tx_interrupt (uint32_t usart)
	Enable TX Interrupt Enable the TX Holding Register Empty interrupt. More...

void	usart_disable_tx_interrupt (uint32_t usart)
	Disable TX Interrupt Disable the TX Holding Register Empty interrupt. More...

void	usart_enable_rls_interrupt (uint32_t usart)
	Enable RX Line Status Interrupt Enable the RX Line Status interrupt. More...

void	usart_disable_rls_interrupt (uint32_t usart)
	Disable RX Line Status Interrupt Disable the RX Line Status interrupt. More...

void	usart_clear_tx_fifo (uint32_t usart)
	Clear the TX FIFO Clears the TX FIFO. More...

void	usart_clear_rx_fifo (uint32_t usart)
	Clear the RX FIFO Clears the RX FIFO. More...

Detailed Description

PAC55xxxx USART Driver

Author: © 2020 Kevin Stefanik kevin.nosp@m.@all.nosp@m.ocor..nosp@m.tech

Date: February 25, 2020

This library supports the USART module in the PAC55xx SoC from Qorvo.

LGPL License Terms libopencm3 License

Function Documentation

◆ usart_break_disable()

void usart_break_disable ( uint32_t usart )

Disable Break Control Disables break control bit that forces TX pin to logic low.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 74 of file usart.c.

References USART_LCR.

◆ usart_break_enable()

void usart_break_enable ( uint32_t usart )

Enable Break Control Enables break control bit that forces TX pin to logic low.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 66 of file usart.c.

References USART_LCR, and USART_LCR_BCON.

◆ usart_clear_rx_fifo()

void usart_clear_rx_fifo ( uint32_t usart )

Clear the RX FIFO Clears the RX FIFO.

The bit is self-clearing.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 196 of file usart.c.

References USART_FCR, and USART_FCR_RXFIFORST.

◆ usart_clear_tx_fifo()

void usart_clear_tx_fifo ( uint32_t usart )

Clear the TX FIFO Clears the TX FIFO.

The bit is self-clearing.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 188 of file usart.c.

References USART_FCR, and USART_FCR_TXFIFORST.

◆ usart_configure_lcr()

void usart_configure_lcr	(	uint32_t	usart,
		uint8_t	data_bits,
		uint8_t	stop_bits,
		uint8_t	parity
	)

USART Configure Line Control Register This register sets the data bits, stop bits, and parity.

Parameters

[in]	usart	unsigned 32 bit. USART block register address base usart_reg_base
[in]	data_bits	unsigned 8 bit. One of USART_DATABITS_5/6/7/8.
[in]	stop_bits	unsigned 8 bit. One of USART_STOPBITS_1/1P5/2.
[in]	parity	unsigned 8 bit. One of USART_PARITY_DISABLE/ODD/EVEN/FORCE1/FORCE0

Definition at line 55 of file usart.c.

References USART_LCR, USART_LCR_PSELPEN, USART_LCR_SBS, USART_LCR_WLS, and USART_STOPBITS_2.

◆ usart_disable_rls_interrupt()

void usart_disable_rls_interrupt ( uint32_t usart )

Disable RX Line Status Interrupt Disable the RX Line Status interrupt.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 180 of file usart.c.

References USART_IER.

◆ usart_disable_rx_interrupt()

void usart_disable_rx_interrupt ( uint32_t usart )

Disable RX Interrupts Disable both the Receive Data Available and Character Timeout interrupts.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 148 of file usart.c.

References USART_IER.

◆ usart_disable_tx_interrupt()

void usart_disable_tx_interrupt ( uint32_t usart )

Disable TX Interrupt Disable the TX Holding Register Empty interrupt.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 164 of file usart.c.

References USART_IER.

◆ usart_enable_rls_interrupt()

void usart_enable_rls_interrupt ( uint32_t usart )

Enable RX Line Status Interrupt Enable the RX Line Status interrupt.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 172 of file usart.c.

References USART_IER, and USART_IER_RLSIE.

◆ usart_enable_rx_interrupt()

void usart_enable_rx_interrupt ( uint32_t usart )

Enable RX Interrupts Enable both the Receive Data Available and Character Timeout interrupts.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 140 of file usart.c.

References USART_IER, and USART_IER_RBRIE.

◆ usart_enable_tx_interrupt()

void usart_enable_tx_interrupt ( uint32_t usart )

Enable TX Interrupt Enable the TX Holding Register Empty interrupt.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 156 of file usart.c.

References USART_IER, and USART_IER_THRIE.

◆ usart_enhanced_disable()

void usart_enhanced_disable ( uint32_t usart )

Disable Enhanced Mode Disable enhanced mode to generate interrupts when FIFO thresholds in FCR are reached.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 90 of file usart.c.

References USART_EFR.

◆ usart_enhanced_enable()

void usart_enhanced_enable ( uint32_t usart )

Enable Enhanced Mode Enable enhanced mode to generate interrupts when FIFO thresholds in FCR are reached.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 82 of file usart.c.

References USART_EFR, and USART_EFR_ENMODE.

◆ usart_fifo_disable()

void usart_fifo_disable ( uint32_t usart )

Disable FIFOs Disable both TX and RX FIFOs.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 106 of file usart.c.

References USART_FCR.

◆ usart_fifo_enable()

void usart_fifo_enable ( uint32_t usart )

Enable FIFOs Enable both TX and RX FIFOs.

This must be set before setting the trigger levels.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Definition at line 98 of file usart.c.

References USART_FCR, and USART_FCR_FIFOEN.

◆ usart_recv()

uint8_t usart_recv ( uint32_t usart )

Read byte from the RX FIFO.

Parameters

[in] usart unsigned 32 bit. USART block register address base usart_reg_base

Returns: Data read from the RX FIFO.

Definition at line 132 of file usart.c.

References USART_RBR.

◆ usart_send()

void usart_send	(	uint32_t	usart,
		uint8_t	data
	)

Write byte to TX FIFO.

Parameters

[in]	usart	unsigned 32 bit. USART block register address base usart_reg_base
[in]	data	unsigned 8 bit. Data to write to the TX FIFO.

Definition at line 124 of file usart.c.

References USART_THR.

◆ usart_set_baudrate()

uint32_t usart_set_baudrate	(	uint32_t	usart,
		uint32_t	baud
	)

USART Set Baudrate The baud rate is computed assuming a peripheral clock of 150MHz.

Parameters

[in]	usart	unsigned 32 bit. USART block register address base usart_reg_base
[in]	baud	unsigned 32 bit. Baud rate specified in Hz.

Returns: Actual baud rate.

Definition at line 39 of file usart.c.

References USART_DLR.

◆ usart_set_fifo_depth()

void usart_set_fifo_depth	(	uint32_t	usart,
		uint8_t	tx_depth,
		uint8_t	rx_depth
	)

Set the TX and RX FIFO depth.

This function also enables the FIFOs if not already.

Parameters

[in]	usart	unsigned 32 bit. USART block register address base usart_reg_base
[in]	tx_depth	unsigned 8 bit. One of USART_FIFO_TRIG_1/2/4/14CHAR.
[in]	rx_depth	unsigned 8 bit. One of USART_FIFO_TRIG_1/2/4/14CHAR.

Definition at line 115 of file usart.c.

References USART_FCR, USART_FCR_FIFOEN, USART_FCR_RXTL, and USART_FCR_TXTL.

Functions

Detailed Description

Function Documentation

◆ usart_break_disable()

◆ usart_break_enable()

◆ usart_clear_rx_fifo()

◆ usart_clear_tx_fifo()

◆ usart_configure_lcr()

◆ usart_disable_rls_interrupt()

◆ usart_disable_rx_interrupt()

◆ usart_disable_tx_interrupt()

◆ usart_enable_rls_interrupt()

◆ usart_enable_rx_interrupt()

◆ usart_enable_tx_interrupt()

◆ usart_enhanced_disable()

◆ usart_enhanced_enable()

◆ usart_fifo_disable()

◆ usart_fifo_enable()

◆ usart_recv()

◆ usart_send()

◆ usart_set_baudrate()

◆ usart_set_fifo_depth()