libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
sam/3a/memorymap.h
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1/*
2 * This file is part of the libopencm3 project.
3 *
4 * Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
5 * Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
6 *
7 * This library is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU Lesser General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public License
18 * along with this library. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#ifndef SAM3A_MEMORYMAP_H
22#define SAM3A_MEMORYMAP_H
23
25
26/* --- SAM3A peripheral space -------------------------------------------- */
27#define HSMCI_BASE (0x40000000U)
28#define SSC_BASE (0x40004000U)
29#define SPI0_BASE (0x40008000U)
30#define SPI1_BASE (0x4000C000U)
31#define TC0_BASE (0x40080000U)
32#define TC1_BASE (0x40080040U)
33#define TC2_BASE (0x40080080U)
34#define TC3_BASE (0x40084000U)
35#define TC4_BASE (0x40084040U)
36#define TC5_BASE (0x40084080U)
37#define TC6_BASE (0x40088000U)
38#define TC7_BASE (0x40088040U)
39#define TC8_BASE (0x40088080U)
40#define TWI0_BASE (0x4008C000U)
41#define TWI1_BASE (0x40090000U)
42#define PWM_BASE (0x40094000U)
43#define USART0_BASE (0x40098000U)
44#define USART1_BASE (0x4009C000U)
45#define USART2_BASE (0x400A0000U)
46#define USART3_BASE (0x400A4000U)
47#define UOTGHS_BASE (0x400AC000U)
48#define CAN0_BASE (0x400B4000U)
49#define CAN1_BASE (0x400B8000U)
50#define TRNG_BASE (0x400BC000U)
51#define ADC_BASE (0x400C0000U)
52#define DMAC_BASE (0x400C4000U)
53#define DACC_BASE (0x400C8000U)
54
55/* --- SAM3A system controller space ------------------------------------- */
56#define SMC_BASE (0x400E0000U)
57#define SDRAM_BASE (0x400E0200U)
58#define MATRIX_BASE (0x400E0400U)
59#define PMC_BASE (0x400E0600U)
60#define UART_BASE (0x400E0800U)
61#define CHIPID_BASE (0x400E0940U)
62#define EEFC0_BASE (0x400E0A00U)
63#define EEFC1_BASE (0x400E0C00U)
64#define PIOA_BASE (0x400E0E00U)
65#define PIOB_BASE (0x400E1000U)
66#define PIOC_BASE (0x400E1200U)
67#define PIOD_BASE (0x400E1400U)
68#define PIOE_BASE (0x400E1600U)
69#define PIOF_BASE (0x400E1800U)
70#define RSTC_BASE (0x400E1A00U)
71#define SUPC_BASE (0x400E1A10U)
72#define RTT_BASE (0x400E1A30U)
73#define WDT_BASE (0x400E1A50U)
74#define RTC_BASE (0x400E1A60U)
75#define GPBR_BASE (0x400E1A90U)
76
77#endif