libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
sam/3s/memorymap.h
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1/*
2 * This file is part of the libopencm3 project.
3 *
4 * Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
5 * Copyright (C) 2014 Felix Held <felix-libopencm3@felixheld.de>
6 *
7 * This library is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU Lesser General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public License
18 * along with this library. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#ifndef SAM3S_MEMORYMAP_H
22#define SAM3S_MEMORYMAP_H
23
24#include <libopencm3/cm3/common.h>
25
26/* --- SAM3S peripheral space -------------------------------------------- */
27#define HSMCI_BASE (0x40000000U)
28#define SSC_BASE (0x40004000U)
29#define SPI_BASE (0x40008000U)
30#define TC0_BASE (0x40010000U)
31#define TC1_BASE (0x40010040U)
32#define TC2_BASE (0x40010080U)
33#define TC3_BASE (0x40014000U)
34#define TC4_BASE (0x40014040U)
35#define TC5_BASE (0x40014080U)
36#define TWI0_BASE (0x40018000U)
37#define TWI1_BASE (0x4001C000U)
38#define PWM_BASE (0x40020000U)
39#define USART0_BASE (0x40024000U)
40#define USART1_BASE (0x40028000U)
41#define USART2_BASE (0x4002C000U)
42#define UDP_BASE (0x40034000U)
43#define ADC_BASE (0x40038000U)
44#define DACC_BASE (0x4003C000U)
45#define ACC_BASE (0x40040000U)
46#define CRCCU_BASE (0x40044000U)
47
48/* --- SAM3S system controller space ------------------------------------- */
49#define SMC_BASE (0x400E0000U)
50#define MATRIX_BASE (0x400E0200U)
51#define PMC_BASE (0x400E0400U)
52#define UART0_BASE (0x400E0600U)
53#define CHIPID_BASE (0x400E0740U)
54#define UART1_BASE (0x400E0800U)
55#define EEFC_BASE (0x400E0A00U)
56#define PIOA_BASE (0x400E0E00U)
57#define PIOB_BASE (0x400E1000U)
58#define PIOC_BASE (0x400E1200U)
59#define RSTC_BASE (0x400E1400U)
60#define SUPC_BASE (0x400E1410U)
61#define RTT_BASE (0x400E1430U)
62#define WDT_BASE (0x400E1450U)
63#define RTC_BASE (0x400E1460U)
64#define GPBR_BASE (0x400E1490U)
65
66#endif