libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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#include <libopencm3/cm3/common.h>
Go to the source code of this file.
Macros | |
#define | HSMCI_BASE (0x40000000U) |
#define | SSC_BASE (0x40004000U) |
#define | SPI_BASE (0x40008000U) |
#define | TC0_BASE (0x40010000U) |
#define | TC1_BASE (0x40010040U) |
#define | TC2_BASE (0x40010080U) |
#define | TC3_BASE (0x40014000U) |
#define | TC4_BASE (0x40014040U) |
#define | TC5_BASE (0x40014080U) |
#define | TWI0_BASE (0x40018000U) |
#define | TWI1_BASE (0x4001C000U) |
#define | PWM_BASE (0x40020000U) |
#define | USART0_BASE (0x40024000U) |
#define | USART1_BASE (0x40028000U) |
#define | USART2_BASE (0x4002C000U) |
#define | UDP_BASE (0x40034000U) |
#define | ADC_BASE (0x40038000U) |
#define | DACC_BASE (0x4003C000U) |
#define | ACC_BASE (0x40040000U) |
#define | CRCCU_BASE (0x40044000U) |
#define | SMC_BASE (0x400E0000U) |
#define | MATRIX_BASE (0x400E0200U) |
#define | PMC_BASE (0x400E0400U) |
#define | UART0_BASE (0x400E0600U) |
#define | CHIPID_BASE (0x400E0740U) |
#define | UART1_BASE (0x400E0800U) |
#define | EEFC_BASE (0x400E0A00U) |
#define | PIOA_BASE (0x400E0E00U) |
#define | PIOB_BASE (0x400E1000U) |
#define | PIOC_BASE (0x400E1200U) |
#define | RSTC_BASE (0x400E1400U) |
#define | SUPC_BASE (0x400E1410U) |
#define | RTT_BASE (0x400E1430U) |
#define | WDT_BASE (0x400E1450U) |
#define | RTC_BASE (0x400E1460U) |
#define | GPBR_BASE (0x400E1490U) |
#define ACC_BASE (0x40040000U) |
Definition at line 45 of file sam/3s/memorymap.h.
#define ADC_BASE (0x40038000U) |
Definition at line 43 of file sam/3s/memorymap.h.
#define CHIPID_BASE (0x400E0740U) |
Definition at line 53 of file sam/3s/memorymap.h.
#define CRCCU_BASE (0x40044000U) |
Definition at line 46 of file sam/3s/memorymap.h.
#define DACC_BASE (0x4003C000U) |
Definition at line 44 of file sam/3s/memorymap.h.
#define EEFC_BASE (0x400E0A00U) |
Definition at line 55 of file sam/3s/memorymap.h.
#define GPBR_BASE (0x400E1490U) |
Definition at line 64 of file sam/3s/memorymap.h.
#define HSMCI_BASE (0x40000000U) |
Definition at line 27 of file sam/3s/memorymap.h.
#define MATRIX_BASE (0x400E0200U) |
Definition at line 50 of file sam/3s/memorymap.h.
#define PIOA_BASE (0x400E0E00U) |
Definition at line 56 of file sam/3s/memorymap.h.
#define PIOB_BASE (0x400E1000U) |
Definition at line 57 of file sam/3s/memorymap.h.
#define PIOC_BASE (0x400E1200U) |
Definition at line 58 of file sam/3s/memorymap.h.
#define PMC_BASE (0x400E0400U) |
Definition at line 51 of file sam/3s/memorymap.h.
#define PWM_BASE (0x40020000U) |
Definition at line 38 of file sam/3s/memorymap.h.
#define RSTC_BASE (0x400E1400U) |
Definition at line 59 of file sam/3s/memorymap.h.
#define RTC_BASE (0x400E1460U) |
Definition at line 63 of file sam/3s/memorymap.h.
#define RTT_BASE (0x400E1430U) |
Definition at line 61 of file sam/3s/memorymap.h.
#define SMC_BASE (0x400E0000U) |
Definition at line 49 of file sam/3s/memorymap.h.
#define SPI_BASE (0x40008000U) |
Definition at line 29 of file sam/3s/memorymap.h.
#define SSC_BASE (0x40004000U) |
Definition at line 28 of file sam/3s/memorymap.h.
#define SUPC_BASE (0x400E1410U) |
Definition at line 60 of file sam/3s/memorymap.h.
#define TC0_BASE (0x40010000U) |
Definition at line 30 of file sam/3s/memorymap.h.
#define TC1_BASE (0x40010040U) |
Definition at line 31 of file sam/3s/memorymap.h.
#define TC2_BASE (0x40010080U) |
Definition at line 32 of file sam/3s/memorymap.h.
#define TC3_BASE (0x40014000U) |
Definition at line 33 of file sam/3s/memorymap.h.
#define TC4_BASE (0x40014040U) |
Definition at line 34 of file sam/3s/memorymap.h.
#define TC5_BASE (0x40014080U) |
Definition at line 35 of file sam/3s/memorymap.h.
#define TWI0_BASE (0x40018000U) |
Definition at line 36 of file sam/3s/memorymap.h.
#define TWI1_BASE (0x4001C000U) |
Definition at line 37 of file sam/3s/memorymap.h.
#define UART0_BASE (0x400E0600U) |
Definition at line 52 of file sam/3s/memorymap.h.
#define UART1_BASE (0x400E0800U) |
Definition at line 54 of file sam/3s/memorymap.h.
#define UDP_BASE (0x40034000U) |
Definition at line 42 of file sam/3s/memorymap.h.
#define USART0_BASE (0x40024000U) |
Definition at line 39 of file sam/3s/memorymap.h.
#define USART1_BASE (0x40028000U) |
Definition at line 40 of file sam/3s/memorymap.h.
#define USART2_BASE (0x4002C000U) |
Definition at line 41 of file sam/3s/memorymap.h.
#define WDT_BASE (0x400E1450U) |
Definition at line 62 of file sam/3s/memorymap.h.