libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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#include <libopencm3/sam/scif.h>
Go to the source code of this file.
Functions | |
int | scif_osc_enable (enum osc_mode mode, uint32_t freq, enum osc_startup startup) |
Enable external oscillator. More... | |
int | scif_enable_pll (uint8_t delay, uint8_t mul, uint8_t div, uint8_t pll_opt, enum pll_clk_src source_clock) |
Configure and enable PLL clock. More... | |
void | scif_enable_gclk (enum generic_clock gclk, enum gclk_src source_clock, uint16_t div) |
Configure and enable Generic Clock. More... | |
void scif_enable_gclk | ( | enum generic_clock | gclk, |
enum gclk_src | source_clock, | ||
uint16_t | div | ||
) |
Configure and enable Generic Clock.
@param[in] gclk enum generic_clock: Generic Clock to configure and enable. @param[in] source_clock enum gclk_src: Source Clock for this Generic Clock. @param[in] div uint16_t: Division Factor. Upper 8 bits only used for Generic Clock 11, If 0, clock is undivided.
Definition at line 120 of file scif.c.
References GENERIC_CLOCK11, SCIF_GCCTRL_CEN, SCIF_GCCTRL_DIV_MASKED, SCIF_GCCTRL_DIVEN, SCIF_GCCTRL_OSCSEL_MASKED, and SCIF_GCTRL.
int scif_enable_pll | ( | uint8_t | delay, |
uint8_t | mul, | ||
uint8_t | div, | ||
uint8_t | pll_opt, | ||
enum pll_clk_src | source_clock | ||
) |
Configure and enable PLL clock.
[in] | delay | uint8_t: Specifies the number of RCSYS clock cycles before ISR.PLLLOCKn will be set after PLL has been written, or after PLL has been automatically re-enabled after exiting a sleep mode. |
[in] | mul | uint8_t: Multiply factor. |
[in] | div | uint8_t: Division factor.These fields determine the ratio of the PLL output frequency to the source oscillator frequency: f_vco = (PLLMUL+1)/PLLDIV * f_ref if PLLDIV >0 f_vco = 2*(PLLMUL+1) * f_ref if PLLDIV = 0 Note that the PLLMUL field should always be greater than 1 or the behavior of the PLL will be undefined. |
[in] | pll_opt | uint8_t: PLL Options. |
Definition at line 82 of file scif.c.
References SCIF_PCLKSR, SCIF_PLL0, SCIF_PLL0_KEY, SCIF_PLL0_PLLCOUNT_MASKED, SCIF_PLL0_PLLDIV_MASKED, SCIF_PLL0_PLLEN, SCIF_PLL0_PLLMUL_MASKED, SCIF_PLL0_PLLOPT_MASKED, SCIF_PLL0_PLLOSC_MASKED, SCIF_PLL0LOCK, and SCIF_UNLOCK.
int scif_osc_enable | ( | enum osc_mode | mode, |
uint32_t | freq, | ||
enum osc_startup | startup | ||
) |
Enable external oscillator.
[in] | mode | enum osc_mode: Oscillator mode (which pins oscillator connected to). |
[in] | freq | uint32_t: External Oscillator frequency, in Hertz. Must be 0.6MHz - 30MHz |
[in] | startup | enum osc_startup: Oscillator start time in RCSYS clock cycles. |
Definition at line 38 of file scif.c.
References SCIF_OSC0RDY, SCIF_OSCCTRL0, SCIF_OSCCTRL0_KEY, SCIF_OSCCTRL_GAIN_SHIFT, SCIF_OSCCTRL_OSCEN, SCIF_OSCCTRL_STARTUP_SHIFT, SCIF_PCLKSR, and SCIF_UNLOCK.