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| #define | FLASH_OPTION_BYTE_0 FLASH_OPTION_BYTE(0) |
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| #define | FLASH_OPTION_BYTE_1 FLASH_OPTION_BYTE(1) |
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| #define | FLASH_OPTION_BYTE_2 FLASH_OPTION_BYTE(2) |
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| #define | FLASH_OPTION_BYTE_3 FLASH_OPTION_BYTE(3) |
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| #define | FLASH_OPTION_BYTE_4 FLASH_OPTION_BYTE(4) |
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| #define | FLASH_OPTION_BYTE_5 FLASH_OPTION_BYTE(5) |
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| #define | FLASH_ACR_LATENCY_000_024MHZ 0 |
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| #define | FLASH_ACR_LATENCY_024_048MHZ 1 |
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| #define | FLASH_ACR_LATENCY_0WS 0 |
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| #define | FLASH_ACR_LATENCY_1WS 1 |
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| #define | FLASH_SR_EOP (1 << 5) |
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| #define | FLASH_SR_WRPRTERR (1 << 4) |
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| #define | FLASH_SR_PGERR (1 << 2) |
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| #define | FLASH_SR_BSY (1 << 0) |
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| #define | FLASH_CR_OBL_LAUNCH (1 << 13) |
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| #define | FLASH_OBR_DATA1_SHIFT 24 |
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| #define | FLASH_OBR_DATA1 (0xFF << FLASH_OBR_DATA1_SHIFT) |
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| #define | FLASH_OBR_DATA0_SHIFT 16 |
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| #define | FLASH_OBR_DATA0 (0xFF << FLASH_OBR_DATA0_SHIFT) |
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| #define | FLASH_OBR_BOOT_SEL (1 << 15) |
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| #define | FLASH_OBR_RAM_PARITY_CHECK (1 << 14) |
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| #define | FLASH_OBR_VDDA_MONITOR (1 << 13) |
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| #define | FLASH_OBR_NBOOT1 (1 << 12) |
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| #define | FLASH_OBR_NBOOT0 (1 << 11) |
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| #define | FLASH_OBR_NRST_STDBY (1 << 10) |
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| #define | FLASH_OBR_NRST_STOP (1 << 9) |
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| #define | FLASH_OBR_WDG_SW (1 << 8) |
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| #define | FLASH_OBR_RDPRT (3 << FLASH_OBR_RDPRT_SHIFT) |
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| #define | FLASH_OBR_RDPRT_L0 (0 << FLASH_OBR_RDPRT_SHIFT) |
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| #define | FLASH_OBR_RDPRT_L1 (1 << FLASH_OBR_RDPRT_SHIFT) |
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| #define | FLASH_OBR_RDPRT_L2 (3 << FLASH_OBR_RDPRT_SHIFT) |
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| #define | FLASH_RDP_L0 ((uint8_t)0xaa) |
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| #define | FLASH_RDP_L1 ((uint8_t)0xf0) /* any value */ |
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| #define | FLASH_RDP_L2 ((uint8_t)0xcc) |
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