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| #define | RCC_APB1LPENR_UART8EN (1 << 31) |
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| #define | RCC_APB1LPENR_UART7EN (1 << 30) |
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| #define | RCC_APB1LPENR_DACLPEN (1 << 29) |
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| #define | RCC_APB1LPENR_PWRLPEN (1 << 28) |
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| #define | RCC_APB1LPENR_CAN2LPEN (1 << 26) |
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| #define | RCC_APB1LPENR_CAN1LPEN (1 << 25) |
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| #define | RCC_APB1LPENR_I2C3LPEN (1 << 23) |
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| #define | RCC_APB1LPENR_I2C2LPEN (1 << 22) |
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| #define | RCC_APB1LPENR_I2C1LPEN (1 << 21) |
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| #define | RCC_APB1LPENR_UART5LPEN (1 << 20) |
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| #define | RCC_APB1LPENR_UART4LPEN (1 << 19) |
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| #define | RCC_APB1LPENR_USART3LPEN (1 << 18) |
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| #define | RCC_APB1LPENR_USART2LPEN (1 << 17) |
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| #define | RCC_APB1LPENR_SPI3LPEN (1 << 15) |
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| #define | RCC_APB1LPENR_SPI2LPEN (1 << 14) |
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| #define | RCC_APB1LPENR_WWDGLPEN (1 << 11) |
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| #define | RCC_APB1LPENR_TIM14LPEN (1 << 8) |
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| #define | RCC_APB1LPENR_TIM13LPEN (1 << 7) |
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| #define | RCC_APB1LPENR_TIM12LPEN (1 << 6) |
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| #define | RCC_APB1LPENR_TIM7LPEN (1 << 5) |
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| #define | RCC_APB1LPENR_TIM6LPEN (1 << 4) |
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| #define | RCC_APB1LPENR_TIM5LPEN (1 << 3) |
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| #define | RCC_APB1LPENR_TIM4LPEN (1 << 2) |
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| #define | RCC_APB1LPENR_TIM3LPEN (1 << 1) |
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| #define | RCC_APB1LPENR_TIM2LPEN (1 << 0) |
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| #define | RCC_APB2LPENR_DSILPEN (1 << 27) |
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| #define | RCC_APB2LPENR_LTDCLPEN (1 << 26) |
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| #define | RCC_APB2LPENR_SAI1LPEN (1 << 22) |
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| #define | RCC_APB2LPENR_SPI6LPEN (1 << 21) |
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| #define | RCC_APB2LPENR_SPI5LPEN (1 << 20) |
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| #define | RCC_APB2LPENR_TIM11LPEN (1 << 18) |
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| #define | RCC_APB2LPENR_TIM10LPEN (1 << 17) |
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| #define | RCC_APB2LPENR_TIM9LPEN (1 << 16) |
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| #define | RCC_APB2LPENR_SYSCFGLPEN (1 << 14) |
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| #define | RCC_APB2LPENR_SPI1LPEN (1 << 12) |
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| #define | RCC_APB2LPENR_SDIOLPEN (1 << 11) |
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| #define | RCC_APB2LPENR_ADC3LPEN (1 << 10) |
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| #define | RCC_APB2LPENR_ADC2LPEN (1 << 9) |
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| #define | RCC_APB2LPENR_ADC1LPEN (1 << 8) |
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| #define | RCC_APB2LPENR_USART6LPEN (1 << 5) |
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| #define | RCC_APB2LPENR_USART1LPEN (1 << 4) |
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| #define | RCC_APB2LPENR_TIM8LPEN (1 << 1) |
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| #define | RCC_APB2LPENR_TIM1LPEN (1 << 0) |
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