libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
lptimer_common_all.c
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1/** @addtogroup lptimer_file LPTIM peripheral API
2 * @ingroup peripheral_apis
3 *
4 * @author @htmlonly &copy; @endhtmlonly 2019 Guillaume Revaillot <g.revaillot@gmail.com>
5 *
6 * @date 2 July 2019
7 *
8 * LGPL License Terms @ref lgpl_license
9 *
10 * @section lptim_api_ex Basic LPTIMER handling API.
11 *
12 * Example: LPTIM1 with 2x clock prescaler, from internal clock (LSE), irq on match and reload.
13 *
14 * @code
15 *
16 * rcc_set_peripheral_clk_sel(LPTIM1, RCC_CCIPR_LPTIM1SEL_LSE);
17 *
18 * rcc_periph_clock_enable(RCC_LPTIM1);
19 *
20 * lptimer_set_internal_clock_source(LPTIM1);
21 * lptimer_enable_trigger(LPTIM1, LPTIM_CFGR_TRIGEN_SW);
22 * lptimer_set_prescaler(LPTIM1, LPTIM_CFGR_PRESC_2);
23 *
24 * lptimer_enable(LPTIM1);
25 *
26 * lptimer_set_period(LPTIM1, 0xffff);
27 * lptimer_set_compare(LPTIM1, 1234);
28 *
29 * lptimer_enable_irq(LPTIM1, LPTIM_IER_ARRMIE | LPTIM_IER_CMPMIE);
30 * nvic_enable_irq(NVIC_LPTIM1_IRQ);
31 *
32 * lptimer_start_counter(LPTIM1, LPTIM_CR_CNTSTRT);
33 *
34 * @endcode
35 *
36 * Note: LPTIM internal clock source selection is device specific, see clock tree
37 * and rcc section of reference manual.
38 *
39 */
40/*
41 * This file is part of the libopencm3 project.
42 *
43 * This library is free software: you can redistribute it and/or modify
44 * it under the terms of the GNU Lesser General Public License as published by
45 * the Free Software Foundation, either version 3 of the License, or
46 * (at your option) any later version.
47 *
48 * This library is distributed in the hope that it will be useful,
49 * but WITHOUT ANY WARRANTY; without even the implied warranty of
50 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
51 * GNU Lesser General Public License for more details.
52 *
53 * You should have received a copy of the GNU Lesser General Public License
54 * along with this library. If not, see <http://www.gnu.org/licenses/>.
55 */
56
57/**@{*/
58
60
61/** @brief Set lptimer Counter
62 *
63 * Set the value of a lptimer counter.
64 *
65 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
66 * @param[in] count Counter value.
67*/
68void lptimer_set_counter(uint32_t lptimer_peripheral, uint16_t count)
69{
70 LPTIM_CNT(lptimer_peripheral) = count;
71}
72
73/** @brief Read lptimer Counter
74 *
75 * Read back the value of lptimer counter.
76 *
77 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
78 * @returns Counter value.
79 */
80uint16_t lptimer_get_counter(uint32_t lptimer_peripheral)
81{
82 return LPTIM_CNT(lptimer_peripheral);
83}
84
85/** @brief Clear lptimer Status Flag.
86 *
87 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
88 * @param[in] flag Status Register clear flag (@ref lptim_icr)
89 */
90void lptimer_clear_flag(uint32_t lptimer_peripheral, uint32_t flag)
91{
92 LPTIM_ICR(lptimer_peripheral) = flag;
93}
94
95/** @brief Read lptimer Status Flag.
96 *
97 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
98 * @param[in] flag Status Register flag (@ref lptim_isr)
99 * @returns flag set.
100 */
101bool lptimer_get_flag(uint32_t lptimer_peripheral, uint32_t flag)
102{
103 return (LPTIM_ISR(lptimer_peripheral) & flag);
104}
105
106/*---------------------------------------------------------------------------*/
107/** @brief Enable lptimer interrupts.
108 *
109 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
110 * @param[in] irq Logical or of all interrupt enable bits to be set (@ref lptim_ier)
111 */
112void lptimer_enable_irq(uint32_t lptimer_peripheral, uint32_t irq)
113{
114 LPTIM_IER(lptimer_peripheral) |= irq;
115}
116
117/*---------------------------------------------------------------------------*/
118/** @brief Disable lptimer Interrupts.
119 *
120 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
121 * @param[in] irq Logical or of all interrupt enable bits to be cleared (@ref lptim_ier)
122 */
123void lptimer_disable_irq(uint32_t lptimer_peripheral, uint32_t irq)
124{
125 LPTIM_IER(lptimer_peripheral) &= ~irq;
126}
127
128/** @brief Enable lptimer.
129 *
130 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
131 */
132void lptimer_enable(uint32_t lptimer_peripheral)
133{
134 LPTIM_CR(lptimer_peripheral) |= LPTIM_CR_ENABLE;
135}
136
137/** @brief Disable lptimer.
138 *
139 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
140 */
141void lptimer_disable(uint32_t lptimer_peripheral)
142{
143 LPTIM_CR(lptimer_peripheral) &= ~LPTIM_CR_ENABLE;
144}
145
146/** @brief Start lptimer in a given mode.
147 *
148 * Starts the timer in specified mode - Either Single (@ref LPTIM_CR_SNGSTRT) or
149 * Continuous mode (@ref LPTIM_CR_CNTSTRT). In Single mode, the timer will stop at
150 * next match on compare or period value.
151 * If LPTIM_CR_SNGSTRT is set while timer is started in countious mode, it
152 * will stop at next match on compare or period value.
153 * If Software trigger is disabled, start will be delayed until programmed
154 * triggers is detected.
155 *
156 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
157 * @param[in] mode lptimer start mode (@ref LPTIM_CR_SNGSTRT or @ref LPTIM_CR_CNTSTRT)
158 */
159void lptimer_start_counter(uint32_t lptimer_peripheral, uint32_t mode)
160{
161 LPTIM_CR(lptimer_peripheral) |= mode;
162}
163
164/** @brief Set lptimer clock prescaler.
165 *
166 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
167 * @param[in] prescaler Clock prescaler (@ref lptim_cfgr_presc)
168 */
169void lptimer_set_prescaler(uint32_t lptimer_peripheral, uint32_t prescaler)
170{
171 uint32_t reg32 = LPTIM_CFGR(lptimer_peripheral);
173 LPTIM_CFGR(lptimer_peripheral) = reg32 | prescaler;
174}
175
176/** @brief Enable lptimer External Trigger
177 *
178 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
179 * @param[in] trigen Enable Trigger
180 */
181void lptimer_enable_trigger(uint32_t lptimer_peripheral, uint32_t trigen)
182{
183 uint32_t reg32 = LPTIM_CFGR(lptimer_peripheral);
185 LPTIM_CFGR(lptimer_peripheral) = reg32 | trigen;
186}
187
188/** @brief Select lptimer Trigger Source
189 *
190 * Select timer external trigger source.
191 *
192 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
193 * @param[in] trigger_source Trigger selector (@ref lptim_cfgr_trigsel)
194 */
195void lptimer_select_trigger_source(uint32_t lptimer_peripheral, uint32_t trigger_source)
196{
197 uint32_t reg32 = LPTIM_CFGR(lptimer_peripheral);
199 LPTIM_CFGR(lptimer_peripheral) = reg32 | trigger_source;
200}
201
202/** @brief Set lptimer counter Compare Value
203 *
204 * Set the timer compare value. Must only be set with timer enabled.
205 *
206 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
207 * @param[in] compare_value Compare value.
208 */
209void lptimer_set_compare(uint32_t lptimer_peripheral, uint16_t compare_value)
210{
211 LPTIM_CMP(lptimer_peripheral) = compare_value;
212}
213
214/** @brief Set lptimer period
215 *
216 * Set the timer period in the auto-reload register. Must only be set with timer
217 * enabled.
218 *
219 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
220 * @param[in] period_value Autoreload value. Must be greater that CMP value.
221 */
222void lptimer_set_period(uint32_t lptimer_peripheral, uint16_t period_value)
223{
224 LPTIM_ARR(lptimer_peripheral) = period_value;
225}
226
227/** @brief Enable lptimer Preload mode.
228 *
229 * Enable lptimer preload mode, delaying update of period and compare registers
230 * to the end of current period.
231 *
232 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
233 */
234void lptimer_enable_preload(uint32_t lptimer_peripheral)
235{
236 LPTIM_CFGR(lptimer_peripheral) |= LPTIM_CFGR_PRELOAD;
237}
238
239/** @brief Disable lptimer Preload mode.
240 *
241 * Disable lptimer preload mode, ensureing updated period and compare registers
242 * values are taken in account immediatly.
243 *
244 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
245 */
246void lptimer_disable_preload(uint32_t lptimer_peripheral)
247{
248 LPTIM_CFGR(lptimer_peripheral) &= ~LPTIM_CFGR_PRELOAD;
249}
250
251
252/** @brief Set lptimer Internal Clock source
253 *
254 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
255 */
256void lptimer_set_internal_clock_source(uint32_t lptimer_peripheral)
257{
258 LPTIM_CFGR(lptimer_peripheral) &= ~LPTIM_CFGR_CKSEL;
259}
260
261/** @brief Set lptimer External Clock source
262 *
263 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
264 */
265void lptimer_set_external_clock_source(uint32_t lptimer_peripheral)
266{
267 LPTIM_CFGR(lptimer_peripheral) |= LPTIM_CFGR_CKSEL;
268}
269
270/** @brief Set lptimer Waveform Output Polarity High
271 *
272 * Set lptimer waveform output to reflect compare result between LPTIN_CNT
273 * and LPTIM_CMP.
274 *
275 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
276 */
277void lptimer_set_waveform_polarity_high(uint32_t lptimer_peripheral)
278{
279 LPTIM_CFGR(lptimer_peripheral) |= LPTIM_CFGR_WAVPOL;
280}
281
282/** @brief Set lptimer Waveform Output Polarity Low
283 *
284 * Set lptimer waveform output to reflect the inverse of the compare result
285 * between LPTIN_CNT and LPTIM_CMP.
286 *
287 * @param[in] lptimer_peripheral lptimer base address (@ref lptim_reg_base)
288 */
289void lptimer_set_waveform_polarity_low(uint32_t lptimer_peripheral)
290{
291 LPTIM_CFGR(lptimer_peripheral) &= ~LPTIM_CFGR_WAVPOL;
292}
293
294/**@}*/
#define LPTIM_CFGR_PRESC_MASK
#define LPTIM_CFGR_TRIGEN_SHIFT
#define LPTIM_CFGR_TRIGSEL_MASK
#define LPTIM_CFGR_PRESC_SHIFT
#define LPTIM_CFGR_TRIGSEL_SHIFT
#define LPTIM_CFGR_TRIGEN_MASK
#define LPTIM_CFGR_PRELOAD
PRELOAD: Register update mode.
#define LPTIM_CFGR_CKSEL
CKSEL: Select internal (0) or external clock source (1)
#define LPTIM_CFGR_WAVPOL
WAVPOL: Waveform shape polarity.
#define LPTIM_CR_ENABLE
ENABLE: LPTIM Enable.
#define LPTIM_CFGR(tim_base)
#define LPTIM_ICR(tim_base)
#define LPTIM_CR(tim_base)
#define LPTIM_IER(tim_base)
#define LPTIM_ISR(tim_base)
#define LPTIM_CNT(tim_base)
#define LPTIM_CMP(tim_base)
#define LPTIM_ARR(tim_base)
void lptimer_disable_irq(uint32_t lptimer_peripheral, uint32_t irq)
Disable lptimer Interrupts.
void lptimer_set_waveform_polarity_high(uint32_t lptimer_peripheral)
Set lptimer Waveform Output Polarity High.
void lptimer_set_prescaler(uint32_t lptimer_peripheral, uint32_t prescaler)
Set lptimer clock prescaler.
void lptimer_set_waveform_polarity_low(uint32_t lptimer_peripheral)
Set lptimer Waveform Output Polarity Low.
void lptimer_enable_preload(uint32_t lptimer_peripheral)
Enable lptimer Preload mode.
bool lptimer_get_flag(uint32_t lptimer_peripheral, uint32_t flag)
Read lptimer Status Flag.
void lptimer_disable(uint32_t lptimer_peripheral)
Disable lptimer.
void lptimer_set_counter(uint32_t lptimer_peripheral, uint16_t count)
Set lptimer Counter.
void lptimer_set_compare(uint32_t lptimer_peripheral, uint16_t compare_value)
Set lptimer counter Compare Value.
uint16_t lptimer_get_counter(uint32_t lptimer_peripheral)
Read lptimer Counter.
void lptimer_enable_trigger(uint32_t lptimer_peripheral, uint32_t trigen)
Enable lptimer External Trigger.
void lptimer_set_internal_clock_source(uint32_t lptimer_peripheral)
Set lptimer Internal Clock source.
void lptimer_set_external_clock_source(uint32_t lptimer_peripheral)
Set lptimer External Clock source.
void lptimer_disable_preload(uint32_t lptimer_peripheral)
Disable lptimer Preload mode.
void lptimer_set_period(uint32_t lptimer_peripheral, uint16_t period_value)
Set lptimer period.
void lptimer_clear_flag(uint32_t lptimer_peripheral, uint32_t flag)
Clear lptimer Status Flag.
void lptimer_enable(uint32_t lptimer_peripheral)
Enable lptimer.
void lptimer_enable_irq(uint32_t lptimer_peripheral, uint32_t irq)
Enable lptimer interrupts.
void lptimer_select_trigger_source(uint32_t lptimer_peripheral, uint32_t trigger_source)
Select lptimer Trigger Source.
void lptimer_start_counter(uint32_t lptimer_peripheral, uint32_t mode)
Start lptimer in a given mode.