libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
pwr_common_v1.h
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1/** @addtogroup pwr_defines
2
3@author @htmlonly &copy; @endhtmlonly 2010 Thomas Otto <tommi@viadmin.org>
4
5*/
6
7/*
8 * This file is part of the libopencm3 project.
9 *
10 * Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
11 *
12 * This library is free software: you can redistribute it and/or modify
13 * it under the terms of the GNU Lesser General Public License as published by
14 * the Free Software Foundation, either version 3 of the License, or
15 * (at your option) any later version.
16 *
17 * This library is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU Lesser General Public License for more details.
21 *
22 * You should have received a copy of the GNU Lesser General Public License
23 * along with this library. If not, see <http://www.gnu.org/licenses/>.
24 */
25
26/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA PWR.H
27The order of header inclusion is important. pwr.h includes the device
28specific memorymap.h header before including this header file.*/
29
30/** @cond */
31#ifdef LIBOPENCM3_PWR_H
32/** @endcond */
33#ifndef LIBOPENCM3_PWR_COMMON_V1_H
34#define LIBOPENCM3_PWR_COMMON_V1_H
35
36/**@{*/
37
38/* --- PWR registers ------------------------------------------------------- */
39
40/** Power control register (PWR_CR) */
41#define PWR_CR MMIO32(POWER_CONTROL_BASE + 0x00)
42
43/** Power control/status register (PWR_CSR) */
44#define PWR_CSR MMIO32(POWER_CONTROL_BASE + 0x04)
45
46/* --- PWR_CR values ------------------------------------------------------- */
47
48/* Bits [31:9]: Reserved, must be kept at reset value. */
49
50/** DBP: Disable backup domain write protection */
51#define PWR_CR_DBP (1 << 8)
52
53/* PLS[7:5]: PVD level selection */
54#define PWR_CR_PLS_LSB 5
55/** @defgroup pwr_pls PVD level selection
56@ingroup STM32F_pwr_defines
57
58@{*/
59#define PWR_CR_PLS_2V2 (0x0 << PWR_CR_PLS_LSB)
60#define PWR_CR_PLS_2V3 (0x1 << PWR_CR_PLS_LSB)
61#define PWR_CR_PLS_2V4 (0x2 << PWR_CR_PLS_LSB)
62#define PWR_CR_PLS_2V5 (0x3 << PWR_CR_PLS_LSB)
63#define PWR_CR_PLS_2V6 (0x4 << PWR_CR_PLS_LSB)
64#define PWR_CR_PLS_2V7 (0x5 << PWR_CR_PLS_LSB)
65#define PWR_CR_PLS_2V8 (0x6 << PWR_CR_PLS_LSB)
66#define PWR_CR_PLS_2V9 (0x7 << PWR_CR_PLS_LSB)
67/**@}*/
68#define PWR_CR_PLS_MASK (0x7 << PWR_CR_PLS_LSB)
69
70/** PVDE: Power voltage detector enable */
71#define PWR_CR_PVDE (1 << 4)
72
73/** CSBF: Clear standby flag */
74#define PWR_CR_CSBF (1 << 3)
75
76/** CWUF: Clear wakeup flag */
77#define PWR_CR_CWUF (1 << 2)
78
79/** PDDS: Power down deepsleep */
80#define PWR_CR_PDDS (1 << 1)
81
82/** LPDS: Low-power deepsleep */
83#define PWR_CR_LPDS (1 << 0)
84
85/* --- PWR_CSR values ------------------------------------------------------ */
86
87/* Bits [31:9]: Reserved, must be kept at reset value. */
88
89/** EWUP: Enable WKUP pin */
90#define PWR_CSR_EWUP (1 << 8)
91
92/* Bits [7:3]: Reserved, must be kept at reset value. */
93
94/** PVDO: PVD output */
95#define PWR_CSR_PVDO (1 << 2)
96
97/** SBF: Standby flag */
98#define PWR_CSR_SBF (1 << 1)
99
100/** WUF: Wakeup flag */
101#define PWR_CSR_WUF (1 << 0)
102
103/* --- PWR function prototypes ------------------------------------------- */
104
106
109void pwr_enable_power_voltage_detect(uint32_t pvd_level);
111void pwr_clear_standby_flag(void);
112void pwr_clear_wakeup_flag(void);
113void pwr_set_standby_mode(void);
114void pwr_set_stop_mode(void);
117void pwr_enable_wakeup_pin(void);
118void pwr_disable_wakeup_pin(void);
119bool pwr_voltage_high(void);
120bool pwr_get_standby_flag(void);
121bool pwr_get_wakeup_flag(void);
122
124
125/**@}*/
126#endif
127/** @cond */
128#else
129#warning "pwr_common_v1.h should not be included explicitly, only via pwr.h"
130#endif
131/** @endcond */
132
#define END_DECLS
Definition: common.h:34
#define BEGIN_DECLS
Definition: common.h:33
void pwr_set_standby_mode(void)
Set Standby Mode in Deep Sleep.
void pwr_enable_backup_domain_write_protect(void)
Re-enable Backup Domain Write Protection.
Definition: pwr_common_v1.c:49
void pwr_disable_power_voltage_detect(void)
Disable Power Voltage Detector.
Definition: pwr_common_v1.c:75
void pwr_voltage_regulator_on_in_stop(void)
Voltage Regulator On in Stop Mode.
void pwr_disable_backup_domain_write_protect(void)
Disable Backup Domain Write Protection.
Definition: pwr_common_v1.c:38
void pwr_clear_wakeup_flag(void)
Clear the Wakeup Flag.
Definition: pwr_common_v1.c:97
bool pwr_get_standby_flag(void)
Get Standby Flag.
void pwr_disable_wakeup_pin(void)
Release Wakeup Pin.
void pwr_voltage_regulator_low_power_in_stop(void)
Voltage Regulator Low Power in Stop Mode.
bool pwr_get_wakeup_flag(void)
Get Wakeup Flag.
void pwr_clear_standby_flag(void)
Clear the Standby Flag.
Definition: pwr_common_v1.c:86
bool pwr_voltage_high(void)
Get Voltage Detector Output.
void pwr_enable_power_voltage_detect(uint32_t pvd_level)
Enable Power Voltage Detector.
Definition: pwr_common_v1.c:64
void pwr_enable_wakeup_pin(void)
Enable Wakeup Pin.
void pwr_set_stop_mode(void)
Set Stop Mode in Deep Sleep.