Defined Constants and Types for the STM32F4xx Power Control More...

Collaboration diagram for PWR Defines:

Modules
	PVD level selection

Macros
#define	PWR_CR_VOS_SHIFT 14
	VOS: Regulator voltage scaling output selection. More...

#define	PWR_CR_VOS_MASK 0x3

#define	PWR_CR_ADCDC1 (1 << 13)
	ADCDC1: Masks extra flash accesses by prefetch (see AN4073) More...

#define	PWR_CR_MRLVDS (1 << 11)
	MRLVDS/MRUDS: Main regulator Low Voltage / Under drive in Deep Sleep. More...

#define	PWR_CR_MRUDS PWR_CR_MRLVDS

#define	PWR_CR_LPLVDS (1 << 10)
	LPLVDS/LPUDS: Low-power regulator Low Voltage / Under drive in Deep Sleep. More...

#define	PWR_CR_LPUDS PWR_CR_LPLVDS

#define	PWR_CR_FPDS (1 << 9)
	FPDS: Flash power down in stop mode. More...

#define	PWR_CSR_VOSRDY (1 << 14)
	VOSRDY: Regulator voltage scaling output selection ready bit. More...

#define	PWR_CSR_BRE (1 << 9)
	BRE: Backup regulator enable. More...

#define	PWR_CSR_BRR (1 << 3)
	BRR: Backup regulator ready. More...

#define	PWR_CR MMIO32(POWER_CONTROL_BASE + 0x00)
	Power control register (PWR_CR) More...

#define	PWR_CSR MMIO32(POWER_CONTROL_BASE + 0x04)
	Power control/status register (PWR_CSR) More...

#define	PWR_CR_DBP (1 << 8)
	DBP: Disable backup domain write protection. More...

#define	PWR_CR_PLS_LSB 5

#define	PWR_CR_PLS_MASK (0x7 << PWR_CR_PLS_LSB)

#define	PWR_CR_PVDE (1 << 4)
	PVDE: Power voltage detector enable. More...

#define	PWR_CR_CSBF (1 << 3)
	CSBF: Clear standby flag. More...

#define	PWR_CR_CWUF (1 << 2)
	CWUF: Clear wakeup flag. More...

#define	PWR_CR_PDDS (1 << 1)
	PDDS: Power down deepsleep. More...

#define	PWR_CR_LPDS (1 << 0)
	LPDS: Low-power deepsleep. More...

#define	PWR_CSR_EWUP (1 << 8)
	EWUP: Enable WKUP pin. More...

#define	PWR_CSR_PVDO (1 << 2)
	PVDO: PVD output. More...

#define	PWR_CSR_SBF (1 << 1)
	SBF: Standby flag. More...

#define	PWR_CSR_WUF (1 << 0)
	WUF: Wakeup flag. More...

Enumerations
enum	pwr_vos_scale { PWR_SCALE1 = 0x3 , PWR_SCALE2 = 0x2 , PWR_SCALE3 = 0x1 }

Functions
void	pwr_set_vos_scale (enum pwr_vos_scale scale)

void	pwr_disable_backup_domain_write_protect (void)
	Disable Backup Domain Write Protection. More...

void	pwr_enable_backup_domain_write_protect (void)
	Re-enable Backup Domain Write Protection. More...

void	pwr_enable_power_voltage_detect (uint32_t pvd_level)
	Enable Power Voltage Detector. More...

void	pwr_disable_power_voltage_detect (void)
	Disable Power Voltage Detector. More...

void	pwr_clear_standby_flag (void)
	Clear the Standby Flag. More...

void	pwr_clear_wakeup_flag (void)
	Clear the Wakeup Flag. More...

void	pwr_set_standby_mode (void)
	Set Standby Mode in Deep Sleep. More...

void	pwr_set_stop_mode (void)
	Set Stop Mode in Deep Sleep. More...

void	pwr_voltage_regulator_on_in_stop (void)
	Voltage Regulator On in Stop Mode. More...

void	pwr_voltage_regulator_low_power_in_stop (void)
	Voltage Regulator Low Power in Stop Mode. More...

void	pwr_enable_wakeup_pin (void)
	Enable Wakeup Pin. More...

void	pwr_disable_wakeup_pin (void)
	Release Wakeup Pin. More...

bool	pwr_voltage_high (void)
	Get Voltage Detector Output. More...

bool	pwr_get_standby_flag (void)
	Get Standby Flag. More...

bool	pwr_get_wakeup_flag (void)
	Get Wakeup Flag. More...

Detailed Description

Defined Constants and Types for the STM32F4xx Power Control

Version: 1.0.0

Author: © 2011 Stephen Caudle scaud.nosp@m.le@d.nosp@m.oceme.nosp@m..com

Date: 4 March 2013

LGPL License Terms libopencm3 License

Author: © 2010 Thomas Otto tommi.nosp@m.@via.nosp@m.dmin..nosp@m.org

Macro Definition Documentation

◆ PWR_CR

#define PWR_CR MMIO32(POWER_CONTROL_BASE + 0x00)

Power control register (PWR_CR)

Definition at line 41 of file pwr_common_v1.h.

◆ PWR_CR_ADCDC1

#define PWR_CR_ADCDC1 (1 << 13)

ADCDC1: Masks extra flash accesses by prefetch (see AN4073)

Definition at line 53 of file f4/pwr.h.

◆ PWR_CR_CSBF

#define PWR_CR_CSBF (1 << 3)

CSBF: Clear standby flag.

Definition at line 74 of file pwr_common_v1.h.

◆ PWR_CR_CWUF

#define PWR_CR_CWUF (1 << 2)

CWUF: Clear wakeup flag.

Definition at line 77 of file pwr_common_v1.h.

◆ PWR_CR_DBP

#define PWR_CR_DBP (1 << 8)

DBP: Disable backup domain write protection.

Definition at line 51 of file pwr_common_v1.h.

◆ PWR_CR_FPDS

#define PWR_CR_FPDS (1 << 9)

FPDS: Flash power down in stop mode.

Definition at line 64 of file f4/pwr.h.

◆ PWR_CR_LPDS

#define PWR_CR_LPDS (1 << 0)

LPDS: Low-power deepsleep.

Definition at line 83 of file pwr_common_v1.h.

◆ PWR_CR_LPLVDS

#define PWR_CR_LPLVDS (1 << 10)

LPLVDS/LPUDS: Low-power regulator Low Voltage / Under drive in Deep Sleep.

Definition at line 60 of file f4/pwr.h.

◆ PWR_CR_LPUDS

#define PWR_CR_LPUDS PWR_CR_LPLVDS

Definition at line 61 of file f4/pwr.h.

◆ PWR_CR_MRLVDS

#define PWR_CR_MRLVDS (1 << 11)

MRLVDS/MRUDS: Main regulator Low Voltage / Under drive in Deep Sleep.

Definition at line 56 of file f4/pwr.h.

◆ PWR_CR_MRUDS

#define PWR_CR_MRUDS PWR_CR_MRLVDS

Definition at line 57 of file f4/pwr.h.

◆ PWR_CR_PDDS

#define PWR_CR_PDDS (1 << 1)

PDDS: Power down deepsleep.

Definition at line 80 of file pwr_common_v1.h.

◆ PWR_CR_PLS_LSB

#define PWR_CR_PLS_LSB 5

Definition at line 54 of file pwr_common_v1.h.

◆ PWR_CR_PLS_MASK

#define PWR_CR_PLS_MASK (0x7 << PWR_CR_PLS_LSB)

Definition at line 68 of file pwr_common_v1.h.

◆ PWR_CR_PVDE

#define PWR_CR_PVDE (1 << 4)

PVDE: Power voltage detector enable.

Definition at line 71 of file pwr_common_v1.h.

◆ PWR_CR_VOS_MASK

#define PWR_CR_VOS_MASK 0x3

Definition at line 50 of file f4/pwr.h.

◆ PWR_CR_VOS_SHIFT

#define PWR_CR_VOS_SHIFT 14

VOS: Regulator voltage scaling output selection.

Definition at line 49 of file f4/pwr.h.

◆ PWR_CSR

#define PWR_CSR MMIO32(POWER_CONTROL_BASE + 0x04)

Power control/status register (PWR_CSR)

Definition at line 44 of file pwr_common_v1.h.

◆ PWR_CSR_BRE

#define PWR_CSR_BRE (1 << 9)

BRE: Backup regulator enable.

Definition at line 72 of file f4/pwr.h.

◆ PWR_CSR_BRR

#define PWR_CSR_BRR (1 << 3)

BRR: Backup regulator ready.

Definition at line 75 of file f4/pwr.h.

◆ PWR_CSR_EWUP

#define PWR_CSR_EWUP (1 << 8)

EWUP: Enable WKUP pin.

Definition at line 90 of file pwr_common_v1.h.

◆ PWR_CSR_PVDO

#define PWR_CSR_PVDO (1 << 2)

PVDO: PVD output.

Definition at line 95 of file pwr_common_v1.h.

◆ PWR_CSR_SBF

#define PWR_CSR_SBF (1 << 1)

SBF: Standby flag.

Definition at line 98 of file pwr_common_v1.h.

◆ PWR_CSR_VOSRDY

#define PWR_CSR_VOSRDY (1 << 14)

VOSRDY: Regulator voltage scaling output selection ready bit.

Definition at line 69 of file f4/pwr.h.

◆ PWR_CSR_WUF

#define PWR_CSR_WUF (1 << 0)

WUF: Wakeup flag.

Definition at line 101 of file pwr_common_v1.h.

Enumeration Type Documentation

◆ pwr_vos_scale

enum pwr_vos_scale

Enumerator
PWR_SCALE1
PWR_SCALE2
PWR_SCALE3

Definition at line 79 of file f4/pwr.h.

Function Documentation

◆ pwr_clear_standby_flag()

void pwr_clear_standby_flag ( void )

Clear the Standby Flag.

This is set when the processor returns from a standby mode.

Definition at line 86 of file pwr_common_v1.c.

References PWR_CR, and PWR_CR_CSBF.

◆ pwr_clear_wakeup_flag()

void pwr_clear_wakeup_flag ( void )

Clear the Wakeup Flag.

This is set when the processor receives a wakeup signal.

Definition at line 97 of file pwr_common_v1.c.

References PWR_CR, and PWR_CR_CWUF.

◆ pwr_disable_backup_domain_write_protect()

void pwr_disable_backup_domain_write_protect ( void )

Disable Backup Domain Write Protection.

This allows backup domain registers to be changed. These registers are write protected after a reset.

Definition at line 38 of file pwr_common_v1.c.

References PWR_CR, and PWR_CR_DBP.

◆ pwr_disable_power_voltage_detect()

void pwr_disable_power_voltage_detect ( void )

Disable Power Voltage Detector.

Definition at line 75 of file pwr_common_v1.c.

References PWR_CR.

◆ pwr_disable_wakeup_pin()

void pwr_disable_wakeup_pin ( void )

Release Wakeup Pin.

The wakeup pin is used for general purpose I/O.

Definition at line 159 of file pwr_common_v1.c.

References PWR_CSR.

◆ pwr_enable_backup_domain_write_protect()

void pwr_enable_backup_domain_write_protect ( void )

Re-enable Backup Domain Write Protection.

This protects backup domain registers from inadvertent change.

Definition at line 49 of file pwr_common_v1.c.

References PWR_CR.

◆ pwr_enable_power_voltage_detect()

void pwr_enable_power_voltage_detect ( uint32_t pvd_level )

Enable Power Voltage Detector.

This provides voltage level threshold detection. The result of detection is provided in the power voltage detector output flag (see pwr_voltage_high) or by setting the EXTI16 interrupt (see datasheet for configuration details).

Parameters

[in] pvd_level uint32_t. Taken from PVD level selection.

Definition at line 64 of file pwr_common_v1.c.

References PWR_CR, and PWR_CR_PVDE.

◆ pwr_enable_wakeup_pin()

void pwr_enable_wakeup_pin ( void )

Enable Wakeup Pin.

The wakeup pin is used for waking the processor from standby mode.

Definition at line 148 of file pwr_common_v1.c.

References PWR_CSR, and PWR_CSR_EWUP.

◆ pwr_get_standby_flag()

bool pwr_get_standby_flag ( void )

Get Standby Flag.

The standby flag is set when the processor returns from a standby state. It is cleared by software (see pwr_clear_standby_flag).

Returns: boolean: TRUE if the processor was in standby state.

Definition at line 188 of file pwr_common_v1.c.

References PWR_CSR, and PWR_CSR_SBF.

◆ pwr_get_wakeup_flag()

bool pwr_get_wakeup_flag ( void )

Get Wakeup Flag.

The wakeup flag is set when a wakeup event has been received. It is cleared by software (see pwr_clear_wakeup_flag).

Returns: boolean: TRUE if a wakeup event was received.

Definition at line 202 of file pwr_common_v1.c.

References PWR_CSR, and PWR_CSR_WUF.

◆ pwr_set_standby_mode()

void pwr_set_standby_mode ( void )

Set Standby Mode in Deep Sleep.

Definition at line 107 of file pwr_common_v1.c.

References PWR_CR, and PWR_CR_PDDS.

◆ pwr_set_stop_mode()

void pwr_set_stop_mode ( void )

Set Stop Mode in Deep Sleep.

Definition at line 117 of file pwr_common_v1.c.

References PWR_CR.

◆ pwr_set_vos_scale()

void pwr_set_vos_scale ( enum pwr_vos_scale scale )

Definition at line 41 of file pwr.c.

References PWR_CR, PWR_CR_VOS_MASK, and PWR_CR_VOS_SHIFT.

Referenced by rcc_clock_setup_pll().

Here is the caller graph for this function:

◆ pwr_voltage_high()

bool pwr_voltage_high ( void )

Get Voltage Detector Output.

The voltage detector threshold must be set when the power voltage detector is enabled, see pwr_enable_power_voltage_detect.

Returns: boolean: TRUE if the power voltage is above the preset voltage threshold.

Definition at line 174 of file pwr_common_v1.c.

References PWR_CSR, and PWR_CSR_PVDO.

◆ pwr_voltage_regulator_low_power_in_stop()

void pwr_voltage_regulator_low_power_in_stop ( void )

Voltage Regulator Low Power in Stop Mode.

Definition at line 137 of file pwr_common_v1.c.

References PWR_CR, and PWR_CR_LPDS.

◆ pwr_voltage_regulator_on_in_stop()

void pwr_voltage_regulator_on_in_stop ( void )

Voltage Regulator On in Stop Mode.

Definition at line 127 of file pwr_common_v1.c.

References PWR_CR.

Modules

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ PWR_CR

◆ PWR_CR_ADCDC1

◆ PWR_CR_CSBF

◆ PWR_CR_CWUF

◆ PWR_CR_DBP

◆ PWR_CR_FPDS

◆ PWR_CR_LPDS

◆ PWR_CR_LPLVDS

◆ PWR_CR_LPUDS

◆ PWR_CR_MRLVDS

◆ PWR_CR_MRUDS

◆ PWR_CR_PDDS

◆ PWR_CR_PLS_LSB

◆ PWR_CR_PLS_MASK

◆ PWR_CR_PVDE

◆ PWR_CR_VOS_MASK

◆ PWR_CR_VOS_SHIFT

◆ PWR_CSR

◆ PWR_CSR_BRE

◆ PWR_CSR_BRR

◆ PWR_CSR_EWUP

◆ PWR_CSR_PVDO

◆ PWR_CSR_SBF

◆ PWR_CSR_VOSRDY

◆ PWR_CSR_WUF

Enumeration Type Documentation

◆ pwr_vos_scale

Function Documentation

◆ pwr_clear_standby_flag()

◆ pwr_clear_wakeup_flag()

◆ pwr_disable_backup_domain_write_protect()

◆ pwr_disable_power_voltage_detect()

◆ pwr_disable_wakeup_pin()

◆ pwr_enable_backup_domain_write_protect()

◆ pwr_enable_power_voltage_detect()

◆ pwr_enable_wakeup_pin()

◆ pwr_get_standby_flag()

◆ pwr_get_wakeup_flag()

◆ pwr_set_standby_mode()

◆ pwr_set_stop_mode()

◆ pwr_set_vos_scale()

◆ pwr_voltage_high()

◆ pwr_voltage_regulator_low_power_in_stop()

◆ pwr_voltage_regulator_on_in_stop()