libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
|
Modules | |
Under-drive enable in stop mode | |
Regulator voltage scaling output selection | |
PVD level selection | |
Macros | |
#define | PWR_CR1_UDEN_LSB 18 |
UDEN[19:18]: Under-drive enable in stop mode. More... | |
#define | PWR_CR1_UDEN_MASK (0x3 << PWR_CR1_UDEN_LSB) |
#define | PWR_CR1_ODSWEN (1 << 17) |
ODSWEN: Over-drive switching enabled. More... | |
#define | PWR_CR1_ODEN (1 << 16) |
ODEN: Over-drive enable. More... | |
#define | PWR_CR1_VOS_LSB 14 |
#define | PWR_CR1_VOS_MASK (0x3 << PWR_CR1_VOS_LSB) |
#define | PWR_CR1_ADCDC1 (1 << 13) |
ADCDC1: Masks extra flash accesses by prefetch (see AN4073) More... | |
#define | PWR_CR1_MRUDS (1 << 11) |
MRUDS: Main regulator in deepsleep under-drive mode. More... | |
#define | PWR_CR1_LPUDS (1 << 10) |
LPUDS: Low-power regulator in deepsleep under-drive mode. More... | |
#define | PWR_CR1_FPDS (1 << 9) |
FPDS: Flash power-down in Stop mode. More... | |
#define | PWR_CR1_DBP (1 << 8) |
DBP: Disable backup domain write protection. More... | |
#define | PWR_CR1_PLS_LSB 5 |
#define | PWR_CR1_PLS_MASK (0x7 << PWR_CR_PLS_LSB) |
#define | PWR_CR1_PVDE (1 << 4) |
PVDE: Power voltage detector enable. More... | |
#define | PWR_CR1_CSBF (1 << 3) |
CSBF: Clear standby flag. More... | |
#define | PWR_CR1_PDDS (1 << 1) |
PDDS: Power down deepsleep. More... | |
#define | PWR_CR1_LPDS (1 << 0) |
LPDS: Low-power deepsleep. More... | |
#define PWR_CR1_ADCDC1 (1 << 13) |
#define PWR_CR1_DBP (1 << 8) |
#define PWR_CR1_FPDS (1 << 9) |
#define PWR_CR1_LPUDS (1 << 10) |
#define PWR_CR1_MRUDS (1 << 11) |
#define PWR_CR1_ODSWEN (1 << 17) |
#define PWR_CR1_PVDE (1 << 4) |
#define PWR_CR1_UDEN_LSB 18 |
#define PWR_CR1_UDEN_MASK (0x3 << PWR_CR1_UDEN_LSB) |
#define PWR_CR1_VOS_MASK (0x3 << PWR_CR1_VOS_LSB) |