libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
PWR_CSR1 values
Collaboration diagram for PWR_CSR1 values:

Modules

 Under-drive ready flag
 

Macros

#define PWR_CSR1_UDRDY_LSB   18
 
#define PWR_CSR1_UDRDY_MASK   (0x3 << PWR_CSR1_UDRDY_LSB)
 
#define PWR_CSR1_ODSWRDY   (1 << 17)
 ODSWRDY: Over-drive mode switching ready. More...
 
#define PWR_CSR1_ODRDY   (1 << 16)
 ODRDY: Over-drive mode ready. More...
 
#define PWR_CSR1_VOSRDY   (1 << 14)
 VOSRDY: Regulator voltage scaling output selection ready bit. More...
 
#define PWR_CSR1_BRE   (1 << 9)
 BRE: Backup regulator enable. More...
 
#define PWR_CSR1_EIWUP   (1 << 8)
 EIWUP: Enable internal wakeup. More...
 
#define PWR_CSR1_BRR   (1 << 3)
 BRR: Backup regulator ready. More...
 
#define PWR_CSR1_PVDO   (1 << 2)
 PVDO: PVD output. More...
 
#define PWR_CSR1_SBF   (1 << 1)
 SBF: Standby flag. More...
 
#define PWR_CSR1_WUIF   (1 << 0)
 WUIF: Wakeup internal flag. More...
 

Detailed Description

Macro Definition Documentation

◆ PWR_CSR1_BRE

#define PWR_CSR1_BRE   (1 << 9)

BRE: Backup regulator enable.

Definition at line 170 of file f7/pwr.h.

◆ PWR_CSR1_BRR

#define PWR_CSR1_BRR   (1 << 3)

BRR: Backup regulator ready.

Definition at line 178 of file f7/pwr.h.

◆ PWR_CSR1_EIWUP

#define PWR_CSR1_EIWUP   (1 << 8)

EIWUP: Enable internal wakeup.

Definition at line 173 of file f7/pwr.h.

◆ PWR_CSR1_ODRDY

#define PWR_CSR1_ODRDY   (1 << 16)

ODRDY: Over-drive mode ready.

Definition at line 160 of file f7/pwr.h.

◆ PWR_CSR1_ODSWRDY

#define PWR_CSR1_ODSWRDY   (1 << 17)

ODSWRDY: Over-drive mode switching ready.

Definition at line 157 of file f7/pwr.h.

◆ PWR_CSR1_PVDO

#define PWR_CSR1_PVDO   (1 << 2)

PVDO: PVD output.

Definition at line 181 of file f7/pwr.h.

◆ PWR_CSR1_SBF

#define PWR_CSR1_SBF   (1 << 1)

SBF: Standby flag.

Definition at line 184 of file f7/pwr.h.

◆ PWR_CSR1_UDRDY_LSB

#define PWR_CSR1_UDRDY_LSB   18

Definition at line 146 of file f7/pwr.h.

◆ PWR_CSR1_UDRDY_MASK

#define PWR_CSR1_UDRDY_MASK   (0x3 << PWR_CSR1_UDRDY_LSB)

Definition at line 154 of file f7/pwr.h.

◆ PWR_CSR1_VOSRDY

#define PWR_CSR1_VOSRDY   (1 << 14)

VOSRDY: Regulator voltage scaling output selection ready bit.

Definition at line 165 of file f7/pwr.h.

◆ PWR_CSR1_WUIF

#define PWR_CSR1_WUIF   (1 << 0)

WUIF: Wakeup internal flag.

Definition at line 187 of file f7/pwr.h.