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#define | CORDIC_CSR_RRDY (0x1 << 31) |
| RRDY: result ready flag. More...
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#define | CORDIC_CSR_ARGSIZE (0x1 << 22) |
| ARGSIZE: Width of input data. More...
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#define | CORDIC_CSR_RESSIZE (0x1 << 21) |
| RESSIZE: Width of result data. More...
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#define | CORDIC_CSR_NARGS (0x1 << 20) |
| NARGS: Number of input data writes. More...
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#define | CORDIC_CSR_NRES (0x1 << 19) |
| NRES: Number of result data reads. More...
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#define | CORDIC_CSR_DMAWEN (0x1 << 18) |
| DMAWEN: DMA write enable. More...
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#define | CORDIC_CSR_DMAREN (0x1 << 17) |
| DMAREN: DMA write enable. More...
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#define | CORDIC_CSR_IEN (0x1 << 16) |
| DMAREN: Interrupt enable. More...
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#define | CORDIC_CSR_SCALE_SHIFT (8) |
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#define | CORDIC_CSR_SCALE_MASK (0x7 << CORDIC_CSR_SCALE_SHIFT) |
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#define | CORDIC_CSR_PRECISION_SHIFT (4) |
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#define | CORDIC_CSR_PRECISION_MASK (0xF << CORDIC_CSR_PRECISION_SHIFT) |
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#define | CORDIC_CSR_FUNC_SHIFT (0) |
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#define | CORDIC_CSR_FUNC_MASK (0xF << CORDIC_CSR_FUNC_SHIFT) |
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