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#define | DAC_MCR_SINFORMAT2 (1 << 25) |
| Enable signed format for DAC channel2. More...
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#define | DAC_MCR_DMADOUBLE2 (1 << 24) |
| DAC channel2 DMA double data mode. More...
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#define | DAC_MCR_MODE2_SHIFT 16 |
| MODE2[2:0]: DAC channel2 mode. More...
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#define | DAC_MCR_MODE2_PERIPHERAL (0x1 << DAC_MCR_MODE2_SHIFT) |
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#define | DAC_MCR_MODE2_UNBUFFERED (0x2 << DAC_MCR_MODE2_SHIFT) |
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#define | DAC_MCR_MODE2_SAMPLEHOLD (0x4 << DAC_MCR_MODE2_SHIFT) |
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#define | DAC_MCR_HFSEL_SHIFT 14 |
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#define | DAC_MCR_HFSEL_MASK 0x3 |
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#define | DAC_MCR_SINFORMAT1 (1 << 9) |
| Enable signed format for DAC channel1. More...
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#define | DAC_MCR_DMADOUBLE1 (1 << 8) |
| DAC channel1 DMA double data mode. More...
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#define | DAC_MCR_MODE1_SHIFT 0 |
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#define | DAC_MCR_MODE1_PERIPHERAL (0x1 << DAC_MCR_MODE1_SHIFT) |
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#define | DAC_MCR_MODE1_UNBUFFERED (0x2 << DAC_MCR_MODE1_SHIFT) |
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#define | DAC_MCR_MODE1_SAMPLEHOLD (0x4 << DAC_MCR_MODE1_SHIFT) |
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