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#define | DAC_CR_TSEL1_CK (0x0 << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_T8 (0x1 << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_T7 (0x2 << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_T15 (0x3 << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_T2 (0x4 << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_T4 (0x5 << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_E9 (0x6 << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_T6 (0x7 << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_T3 (0x8 << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_HRR1 (0x9 << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_HRR2 (0xA << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_HRR3 (0xB << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_HRR4 (0xC << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_HRR5 (0xD << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_HRR6 (0xE << DAC_CR_TSEL1_SHIFT) |
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#define | DAC_CR_TSEL1_HR3 (0xF << DAC_CR_TSEL1_SHIFT) |
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