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#define | USART_CR3_WUFIE (1 << 22) |
| WUFIE: Wakeup from Stop mode interrupt enable. More...
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#define | USART_CR3_WUS_ADDRMATCH (0x0 << 20) |
| WUS[1:0]: Wakeup from Stop mode interrupt flag selection. More...
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#define | USART_CR3_WUS_START_BIT (0x2 << 20) |
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#define | USART_CR3_WUS_RXNE (0x3 << 20) |
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#define | USART_CR3_SCARCNT_SHIFT 17 |
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#define | USART_CR3_SCARCNT_MASK 0x7 |
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#define | USART_CR3_SCARCNT_DISABLE (0 << USART_CR3_SCARCNT_SHIFT) |
| SCARCNT[2:0]: Smartcard auto retry count. More...
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#define | USART_CR3_SCARCNT_VAL(x) ((x) << USART_CR3_SCARCNT_SHIFT) |
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#define | USART_CR3_DEP (1 << 15) |
| DEP: Driver enable polarity selection. More...
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#define | USART_CR3_DEM (1 << 14) |
| DEM: Driver enable mode. More...
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#define | USART_CR3_DDRE (1 << 13) |
| DDRE: DMA Disable on Reception Error. More...
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#define | USART_CR3_OVRDIS (1 << 12) |
| OVRDIS: Overrun Disable. More...
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#define | USART_CR3_ONEBIT (1 << 11) |
| ONEBIT: One sample bit method enable. More...
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#define | USART_CR3_CTSIE (1 << 10) |
| CTSIE: CTS interrupt enable. More...
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#define | USART_CR3_CTSE (1 << 9) |
| CTSE: CTS enable. More...
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#define | USART_CR3_RTSE (1 << 8) |
| RTSE: RTS enable. More...
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#define | USART_CR3_DMAT (1 << 7) |
| DMAT: DMA enable transmitter. More...
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#define | USART_CR3_DMAR (1 << 6) |
| DMAR: DMA enable receiver. More...
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#define | USART_CR3_SCEN (1 << 5) |
| SCEN: Smartcard mode enable. More...
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#define | USART_CR3_NACK (1 << 4) |
| NACK: Smartcard NACK enable. More...
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#define | USART_CR3_HDSEL (1 << 3) |
| HDSEL: Half-duplex selection. More...
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#define | USART_CR3_IRLP (1 << 2) |
| IRLP: IrDA low-power. More...
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#define | USART_CR3_IREN (1 << 1) |
| IREN: IrDA mode enable. More...
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#define | USART_CR3_EIE (1 << 0) |
| EIE: Error interrupt enable. More...
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