Macros | |
| #define | DAC_SR_DMAUDR1 (1 << 13) |
| DAC channel 1 DMA underrun flag. More... | |
| #define | DAC_SR_DMAUDR2 (1 << 29) |
| DAC channel 2 DMA underrun flag. More... | |
| #define | DAC_SR_BWST2 (1 << 31) |
| DAC channel2 busy writing sample time flag. More... | |
| #define | DAC_SR_CAL_FLAG2 (1 << 30) |
| DAC channel2 calibration offset status. More... | |
| #define | DAC_SR_DMAUDR2 (1 << 29) |
| DAC channel2 DMA underrun flag. More... | |
| #define | DAC_SR_DORSTAT2 (1 << 28) |
| DAC channel2 output register status bit. More... | |
| #define | DAC_SR_DAC2RDY (1 << 27) |
| DAC channel2 ready status bit. More... | |
| #define | DAC_SR_BWST1 (1 << 15) |
| DAC channel1 busy writing sample time flag. More... | |
| #define | DAC_SR_CAL_FLAG1 (1 << 14) |
| DAC channel1 calibration offset status. More... | |
| #define | DAC_SR_DMAUDR1 (1 << 13) |
| DAC channel1 DMA underrun flag. More... | |
| #define | DAC_SR_DORSTAT1 (1 << 12) |
| DAC channel1 output register status bit. More... | |
| #define | DAC_SR_DAC1RDY (1 << 11) |
| DAC channel1 ready status bit. More... | |
Detailed Description
Macro Definition Documentation
◆ DAC_SR_BWST1
| #define DAC_SR_BWST1 (1 << 15) |
DAC channel1 busy writing sample time flag.
Definition at line 216 of file dac_common_v2.h.
◆ DAC_SR_BWST2
| #define DAC_SR_BWST2 (1 << 31) |
DAC channel2 busy writing sample time flag.
Definition at line 201 of file dac_common_v2.h.
◆ DAC_SR_CAL_FLAG1
| #define DAC_SR_CAL_FLAG1 (1 << 14) |
DAC channel1 calibration offset status.
Definition at line 219 of file dac_common_v2.h.
◆ DAC_SR_CAL_FLAG2
| #define DAC_SR_CAL_FLAG2 (1 << 30) |
DAC channel2 calibration offset status.
Definition at line 204 of file dac_common_v2.h.
◆ DAC_SR_DAC1RDY
| #define DAC_SR_DAC1RDY (1 << 11) |
DAC channel1 ready status bit.
Definition at line 228 of file dac_common_v2.h.
◆ DAC_SR_DAC2RDY
| #define DAC_SR_DAC2RDY (1 << 27) |
DAC channel2 ready status bit.
Definition at line 213 of file dac_common_v2.h.
◆ DAC_SR_DMAUDR1 [1/2]
| #define DAC_SR_DMAUDR1 (1 << 13) |
DAC channel 1 DMA underrun flag.
Definition at line 219 of file dac_common_all.h.
◆ DAC_SR_DMAUDR1 [2/2]
| #define DAC_SR_DMAUDR1 (1 << 13) |
DAC channel1 DMA underrun flag.
Definition at line 222 of file dac_common_v2.h.
◆ DAC_SR_DMAUDR2 [1/2]
| #define DAC_SR_DMAUDR2 (1 << 29) |
DAC channel 2 DMA underrun flag.
Definition at line 222 of file dac_common_all.h.
◆ DAC_SR_DMAUDR2 [2/2]
| #define DAC_SR_DMAUDR2 (1 << 29) |
DAC channel2 DMA underrun flag.
Definition at line 207 of file dac_common_v2.h.
◆ DAC_SR_DORSTAT1
| #define DAC_SR_DORSTAT1 (1 << 12) |
DAC channel1 output register status bit.
Definition at line 225 of file dac_common_v2.h.
◆ DAC_SR_DORSTAT2
| #define DAC_SR_DORSTAT2 (1 << 28) |
DAC channel2 output register status bit.
Definition at line 210 of file dac_common_v2.h.
