libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
TIMx_SMCR SMS Slave mode selection
Collaboration diagram for TIMx_SMCR SMS Slave mode selection:

Macros

#define TIM_SMCR_SMS_OFF   (0x0 << 0)
 Slave mode disabled. More...
 
#define TIM_SMCR_SMS_EM1   (0x1 << 0)
 Encoder mode 1 - Counter counts up/down on TI2FP2 edge depending on TI1FP1 level. More...
 
#define TIM_SMCR_SMS_EM2   (0x2 << 0)
 Encoder mode 2 - Counter counts up/down on TI1FP1 edge depending on TI2FP2 level. More...
 
#define TIM_SMCR_SMS_EM3   (0x3 << 0)
 Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the complementary input. More...
 
#define TIM_SMCR_SMS_RM   (0x4 << 0)
 Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers. More...
 
#define TIM_SMCR_SMS_GM   (0x5 << 0)
 Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. More...
 
#define TIM_SMCR_SMS_TM   (0x6 << 0)
 Trigger Mode - The counter starts at a rising edge of the trigger TRGI. More...
 
#define TIM_SMCR_SMS_ECM1   (0x7 << 0)
 External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter. More...
 
#define TIM_SMCR_SMS_MASK   (0x7 << 0)
 

Detailed Description

Macro Definition Documentation

◆ TIM_SMCR_SMS_ECM1

#define TIM_SMCR_SMS_ECM1   (0x7 << 0)

External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter.

Definition at line 573 of file timer_common_all.h.

◆ TIM_SMCR_SMS_EM1

#define TIM_SMCR_SMS_EM1   (0x1 << 0)

Encoder mode 1 - Counter counts up/down on TI2FP2 edge depending on TI1FP1 level.

Definition at line 553 of file timer_common_all.h.

◆ TIM_SMCR_SMS_EM2

#define TIM_SMCR_SMS_EM2   (0x2 << 0)

Encoder mode 2 - Counter counts up/down on TI1FP1 edge depending on TI2FP2 level.

Definition at line 556 of file timer_common_all.h.

◆ TIM_SMCR_SMS_EM3

#define TIM_SMCR_SMS_EM3   (0x3 << 0)

Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the complementary input.

Definition at line 559 of file timer_common_all.h.

◆ TIM_SMCR_SMS_GM

#define TIM_SMCR_SMS_GM   (0x5 << 0)

Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high.

Definition at line 567 of file timer_common_all.h.

◆ TIM_SMCR_SMS_MASK

#define TIM_SMCR_SMS_MASK   (0x7 << 0)

Definition at line 574 of file timer_common_all.h.

◆ TIM_SMCR_SMS_OFF

#define TIM_SMCR_SMS_OFF   (0x0 << 0)

Slave mode disabled.

Definition at line 550 of file timer_common_all.h.

◆ TIM_SMCR_SMS_RM

#define TIM_SMCR_SMS_RM   (0x4 << 0)

Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers.

Definition at line 563 of file timer_common_all.h.

◆ TIM_SMCR_SMS_TM

#define TIM_SMCR_SMS_TM   (0x6 << 0)

Trigger Mode - The counter starts at a rising edge of the trigger TRGI.

Definition at line 569 of file timer_common_all.h.