libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
pwr.c
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1/** @defgroup pwr_file PWR peripheral API
2 *
3 * @ingroup peripheral_apis
4 *
5 * @brief <b>libopencm3 STM32L4xx Power Control</b>
6 *
7 * @version 1.0.0
8 *
9 * @author @htmlonly &copy; @endhtmlonly 2016 Benjamin Levine <benjamin@jesco.karoo.co.uk>
10 *
11 * @date 4 March 2013
12 *
13 * This library supports the power control system for the
14 * STM32L4 series of ARM Cortex Microcontrollers by ST Microelectronics.
15 *
16 * LGPL License Terms @ref lgpl_license
17 */
18/*
19 * This file is part of the libopencm3 project.
20 *
21 * Copyright (C) 2016 Benjamin Levine <benjamin@jesco.karoo.co.uk>
22 *
23 * This library is free software: you can redistribute it and/or modify
24 * it under the terms of the GNU Lesser General Public License as published by
25 * the Free Software Foundation, either version 3 of the License, or
26 * (at your option) any later version.
27 *
28 * This library is distributed in the hope that it will be useful,
29 * but WITHOUT ANY WARRANTY; without even the implied warranty of
30 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31 * GNU Lesser General Public License for more details.
32 *
33 * You should have received a copy of the GNU Lesser General Public License
34 * along with this library. If not, see <http://www.gnu.org/licenses/>.
35 */
36/**@{*/
38
40{
41 uint32_t reg32;
42
43 reg32 = PWR_CR1;
45 switch (scale) {
46 case PWR_SCALE1:
48 break;
49 case PWR_SCALE2:
51 break;
52 }
53 PWR_CR1 = reg32;
54}
55
56/** Disable Backup Domain Write Protection
57 *
58 * This allows backup domain registers to be changed. These registers are write
59 * protected after a reset.
60 */
62{
64}
65
66/** Re-enable Backup Domain Write Protection
67 *
68 * This protects backup domain registers from inadvertent change.
69 */
71{
72 PWR_CR1 &= ~PWR_CR1_DBP;
73}
74
75/**@}*/
#define PWR_CR1_DBP
Definition: l4/pwr.h:76
#define PWR_CR1_VOS_MASK
Definition: l4/pwr.h:72
#define PWR_CR1_VOS_SHIFT
Definition: l4/pwr.h:71
#define PWR_CR1_VOS_RANGE_2
Definition: l4/pwr.h:74
pwr_vos_scale
Definition: l4/pwr.h:165
#define PWR_CR1_VOS_RANGE_1
Definition: l4/pwr.h:73
#define PWR_CR1
Definition: l4/pwr.h:47
@ PWR_SCALE1
Definition: l4/pwr.h:166
@ PWR_SCALE2
Definition: l4/pwr.h:167
void pwr_enable_backup_domain_write_protect(void)
Re-enable Backup Domain Write Protection.
Definition: pwr.c:70
void pwr_disable_backup_domain_write_protect(void)
Disable Backup Domain Write Protection.
Definition: pwr.c:61
void pwr_set_vos_scale(enum pwr_vos_scale scale)
Definition: pwr.c:39