Collaboration diagram for User interrupts for SWM050 series:

Macros
#define	NVIC_TIMER_SE0_IRQ 0

#define	NVIC_TIMER_SE1_IRQ 1

#define	NVIC_WDT_IRQ 2

#define	NVIC_CP_IRQ 3

#define	NVIC_GPIOA0_IRQ 4

#define	NVIC_GPIOA1_IRQ 5

#define	NVIC_GPIOA2_IRQ 6

#define	NVIC_GPIOA3_IRQ 7

#define	NVIC_GPIOA4_IRQ 8

#define	NVIC_GPIOA5_IRQ 9

#define	NVIC_GPIOA6_IRQ 10

#define	NVIC_GPIOA7_IRQ 11

#define	NVIC_GPIOA8_IRQ 12

#define	NVIC_GPIOA9_IRQ 13

#define	NVIC_IRQ_COUNT 14

Detailed Description

Macro Definition Documentation

◆ NVIC_CP_IRQ

#define NVIC_CP_IRQ 3

Definition at line 19 of file swm050/nvic.h.

◆ NVIC_GPIOA0_IRQ

#define NVIC_GPIOA0_IRQ 4

Definition at line 20 of file swm050/nvic.h.

◆ NVIC_GPIOA1_IRQ

#define NVIC_GPIOA1_IRQ 5

Definition at line 21 of file swm050/nvic.h.

◆ NVIC_GPIOA2_IRQ

#define NVIC_GPIOA2_IRQ 6

Definition at line 22 of file swm050/nvic.h.

◆ NVIC_GPIOA3_IRQ

#define NVIC_GPIOA3_IRQ 7

Definition at line 23 of file swm050/nvic.h.

◆ NVIC_GPIOA4_IRQ

#define NVIC_GPIOA4_IRQ 8

Definition at line 24 of file swm050/nvic.h.

◆ NVIC_GPIOA5_IRQ

#define NVIC_GPIOA5_IRQ 9

Definition at line 25 of file swm050/nvic.h.

◆ NVIC_GPIOA6_IRQ

#define NVIC_GPIOA6_IRQ 10

Definition at line 26 of file swm050/nvic.h.

◆ NVIC_GPIOA7_IRQ

#define NVIC_GPIOA7_IRQ 11

Definition at line 27 of file swm050/nvic.h.

◆ NVIC_GPIOA8_IRQ

#define NVIC_GPIOA8_IRQ 12

Definition at line 28 of file swm050/nvic.h.

◆ NVIC_GPIOA9_IRQ

#define NVIC_GPIOA9_IRQ 13

Definition at line 29 of file swm050/nvic.h.

◆ NVIC_IRQ_COUNT

#define NVIC_IRQ_COUNT 14

Definition at line 31 of file swm050/nvic.h.

◆ NVIC_TIMER_SE0_IRQ

#define NVIC_TIMER_SE0_IRQ 0

Definition at line 16 of file swm050/nvic.h.

◆ NVIC_TIMER_SE1_IRQ

#define NVIC_TIMER_SE1_IRQ 1

Definition at line 17 of file swm050/nvic.h.

◆ NVIC_WDT_IRQ

#define NVIC_WDT_IRQ 2

Definition at line 18 of file swm050/nvic.h.

Macros