SYSCTL Registers

Collaboration diagram for SYSCTL Registers:

Macros
#define	SYSCTL_SYS_CFG_0   MMIO32(SYSCTL_BASE + 0x0)
	Clock dividers for TIMERSE and SCLK. More...
#define	SYSCTL_SYS_CFG_1   MMIO32(SYSCTL_BASE + 0x4)
	TIMERSE0, TIMERSE1, and WDT enable. More...
#define	SYSCTL_SYS_DBLF   MMIO32(SYSCTL_BASE + 0x8)
	SCLK multiplier (18Mhz and 36Mhz) More...
#define	SYSCTL_SYS_CFG_2   MMIO32(SYSCTL_BASE + 0xC)
	MOS Disconnect (Synwit says that this subregister is unused), Sleep Mode, and Internal Oscillator Disconnect. More...

Detailed Description

Note

System configuration registers

Macro Definition Documentation

SYSCTL_SYS_CFG_0

#define SYSCTL_SYS_CFG_0   MMIO32(SYSCTL_BASE + 0x0)

Clock dividers for TIMERSE and SCLK.

Definition at line 46 of file sysctl.h.

SYSCTL_SYS_CFG_1

#define SYSCTL_SYS_CFG_1   MMIO32(SYSCTL_BASE + 0x4)

TIMERSE0, TIMERSE1, and WDT enable.

Definition at line 48 of file sysctl.h.

SYSCTL_SYS_CFG_2

#define SYSCTL_SYS_CFG_2   MMIO32(SYSCTL_BASE + 0xC)

MOS Disconnect (Synwit says that this subregister is unused), Sleep Mode, and Internal Oscillator Disconnect.

Oscillator Disconnect should probably not be used on the SWM050, because it has no external oscillator support

Definition at line 54 of file sysctl.h.

SYSCTL_SYS_DBLF

#define SYSCTL_SYS_DBLF   MMIO32(SYSCTL_BASE + 0x8)

SCLK multiplier (18Mhz and 36Mhz)

Definition at line 50 of file sysctl.h.