libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
crypto_common_f24.h
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1/** @addtogroup crypto_defines
2 *
3 * @warning The CRYP subsystem is present only in a limited set of devices,
4 * see next section for list of supported devices.
5 *
6 * @section crypto_api_supported Supported devices
7 *
8 * - STM32F205
9 * - STM32F207
10 * - STM32F215
11 * - STM32F217
12 * - STM32F405
13 * - STM32F407
14 * - STM32F415
15 * - STM32F417 <i>(tested)</i>
16 * - STM32F427
17 * - STM32F437
18 *
19 * @section crypto_api_theory Theory of operation
20 *
21 *
22 *
23 * @section crypto_api_basic Basic handling API
24 *
25 *
26 * @b Example @b 1: Blocking mode
27 *
28 * @code
29 * //[enable-clocks]
30 * crypto_set_key(CRYPTO_KEY_128BIT,key);
31 * crypto_set_iv(iv); // only in CBC or CTR mode
32 * crypto_set_datatype(CRYPTO_DATA_16BIT);
33 * crypto_set_algorithm(ENCRYPT_AES_ECB);
34 * crypto_start();
35 * foreach(block in blocks)
36 * crypto_process_block(plaintext,ciphertext,blocksize);
37 * crypto_stop();
38 * @endcode
39 *
40 * @section crypto_api_interrupt Interrupt supported handling API
41 *
42 * @warning This operation mode is currently not supported.
43 *
44 * @b Example @b 2: Interrupt mode
45 *
46 * @code
47 * //[enable-clocks]
48 * crypto_set_key(CRYPTO_KEY_128BIT,key);
49 * crypto_set_iv(iv); // only in CBC or CTR mode
50 * crypto_set_datatype(CRYPTO_DATA_16BIT);
51 * crypto_set_algorithm(ENCRYPT_AES_ECB);
52 * crypto_start();
53 * [... API to be described later ...]
54 * crypto_stop();
55 * @endcode
56 *
57 * @section crypto_api_dma DMA handling API
58 *
59 * @warning This operation mode is currently not supported.
60 *
61 * @b Example @b 3: DMA mode
62 *
63 * @code
64 * //[enable-clocks]
65 * crypto_set_key(CRYPTO_KEY_128BIT,key);
66 * crypto_set_iv(iv); // only in CBC or CTR mode
67 * crypto_set_datatype(CRYPTO_DATA_16BIT);
68 * crypto_set_algorithm(ENCRYPT_AES_ECB);
69 * crypto_start();
70 * [... API to be described later ...]
71 * crypto_stop();
72 * @endcode
73 */
74
75/*
76 * This file is part of the libopencm3 project.
77 *
78 * This library is free software: you can redistribute it and/or modify
79 * it under the terms of the GNU Lesser General Public License as published by
80 * the Free Software Foundation, either version 3 of the License, or
81 * (at your option) any later version.
82 *
83 * This library is distributed in the hope that it will be useful,
84 * but WITHOUT ANY WARRANTY; without even the implied warranty of
85 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
86 * GNU Lesser General Public License for more details.
87 *
88 * You should have received a copy of the GNU Lesser General Public License
89 * along with this library. If not, see <http://www.gnu.org/licenses/>.
90 */
91
92/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA CRYP.H
93The order of header inclusion is important. cryp.h includes the device
94specific memorymap.h header before including this header file.*/
95
96/** @cond */
97#ifdef LIBOPENCM3_CRYPTO_H
98/** @endcond */
99
100#ifndef LIBOPENCM3_CRYPTO_COMMON_F24_H
101#define LIBOPENCM3_CRYPTO_COMMON_F24_H
102
103/**@{*/
104
105/* --- CRYP registers ------------------------------------------------------ */
106/** @defgroup crypto_registers_gen Registers (Generic)
107 *
108 * @brief Register access to the CRYP controller. (All chips)
109 *
110 * @ingroup crypto_defines
111 */
112/**@{*/
113
114#define CRYP CRYP_BASE
115
116/* CRYP Control Register (CRYP_CR) */
117#define CRYP_CR MMIO32(CRYP_BASE + 0x00)
118
119/* CRYP Status Register (CRYP_SR) */
120#define CRYP_SR MMIO32(CRYP_BASE + 0x04)
121
122/* CRYP Data Input Register (CRYP_DIN) */
123#define CRYP_DIN MMIO32(CRYP_BASE + 0x08)
124
125/** CRYP Data Output Register (CRYP_DOUT) @see blablabla */
126#define CRYP_DOUT MMIO32(CRYP_BASE + 0x0C)
127
128/* CRYP DMA Control Register (CRYP_DMACR) */
129#define CRYP_DMACR MMIO32(CRYP_BASE + 0x10)
130
131/* CRYP Interrupt mask set/clear register (CRYP_IMSCR) */
132#define CRYP_IMSCR MMIO32(CRYP_BASE + 0x14)
133
134/* CRYP Raw Interrupt status register (CRYP_RISR) */
135#define CRYP_RISR MMIO32(CRYP_BASE + 0x18)
136
137/* CRYP Masked Interrupt status register (CRYP_MISR) */
138#define CRYP_MISR MMIO32(CRYP_BASE + 0x1C)
139
140/* CRYP Key registers (CRYP_KxLR) x=0..3 */
141#define CRYP_KR(i) MMIO64(CRYP_BASE + 0x20 + (i) * 8)
142
143/* CRYP Initialization Vector Registers (CRYP_IVxLR) x=0..1 */
144#define CRYP_IVR(i) MMIO32(CRYP_BASE + 0x40 + (i) * 8)
145
146/* --- CRYP_CR values ------------------------------------------------------ */
147
148/* ALGODIR: Algorithm direction */
149#define CRYP_CR_ALGODIR (1 << 2)
150
151/* ALGOMODE: Algorithm mode */
152#define CRYP_CR_ALGOMODE_SHIFT 3
153#define CRYP_CR_ALGOMODE (7 << CRYP_CR_ALGOMODE_SHIFT)
154#define CRYP_CR_ALGOMODE_TDES_ECB (0 << CRYP_CR_ALGOMODE_SHIFT)
155#define CRYP_CR_ALGOMODE_TDES_CBC (1 << CRYP_CR_ALGOMODE_SHIFT)
156#define CRYP_CR_ALGOMODE_DES_ECB (2 << CRYP_CR_ALGOMODE_SHIFT)
157#define CRYP_CR_ALGOMODE_DES_CBC (3 << CRYP_CR_ALGOMODE_SHIFT)
158#define CRYP_CR_ALGOMODE_AES_ECB (4 << CRYP_CR_ALGOMODE_SHIFT)
159#define CRYP_CR_ALGOMODE_AES_CBC (5 << CRYP_CR_ALGOMODE_SHIFT)
160#define CRYP_CR_ALGOMODE_AES_CTR (6 << CRYP_CR_ALGOMODE_SHIFT)
161#define CRYP_CR_ALGOMODE_AES_PREP (7 << CRYP_CR_ALGOMODE_SHIFT)
162
163/* DATATYPE: Data type selection */
164#define CRYP_CR_DATATYPE_SHIFT 6
165#define CRYP_CR_DATATYPE (3 << CRYP_CR_DATATYPE_SHIFT)
166#define CRYP_CR_DATATYPE_32 (0 << CRYP_CR_DATATYPE_SHIFT)
167#define CRYP_CR_DATATYPE_16 (1 << CRYP_CR_DATATYPE_SHIFT)
168#define CRYP_CR_DATATYPE_8 (2 << CRYP_CR_DATATYPE_SHIFT)
169#define CRYP_CR_DATATYPE_BIT (3 << CRYP_CR_DATATYPE_SHIFT)
170
171/* KEYSIZE: Key size selection (AES mode only)*/
172#define CRYP_CR_KEYSIZE_SHIFT 8
173#define CRYP_CR_KEYSIZE (3 << CRYP_CR_KEYSIZE_SHIFT)
174#define CRYP_CR_KEYSIZE_128 (0 << CRYP_CR_KEYSIZE_SHIFT)
175#define CRYP_CR_KEYSIZE_192 (1 << CRYP_CR_KEYSIZE_SHIFT)
176#define CRYP_CR_KEYSIZE_256 (2 << CRYP_CR_KEYSIZE_SHIFT)
177
178/* FFLUSH: FIFO Flush */
179#define CRYP_CR_FFLUSH (1 << 14)
180
181/* CRYPEN: Cryptographic processor enable*/
182#define CRYP_CR_CRYPEN (1 << 15)
183
184/* --- CRYP_SR values ------------------------------------------------------ */
185
186/* IFEM: Input FIFO empty */
187#define CRYP_SR_IFEM (1 << 0)
188
189/* IFNF: Input FIFO not full */
190#define CRYP_SR_IFNF (1 << 1)
191
192/* OFNE: Output FIFO not empty */
193#define CRYP_SR_OFNE (1 << 2)
194
195/* OFFU: Output FIFO full */
196#define CRYP_SR_OFFU (1 << 3)
197
198/* BUSY: Busy bit */
199#define CRYP_SR_BUSY (1 << 4)
200
201/* --- CRYP_DMACR values --------------------------------------------------- */
202
203/* DIEN: DMA input enable */
204#define CRYP_DMACR_DIEN (1 << 0)
205
206/* DOEN: DMA output enable */
207#define CRYP_DMACR_DOEN (1 << 1)
208
209/* --- CRYP_IMSCR values --------------------------------------------------- */
210
211/* INIM: Input FIFO service interrupt mask */
212#define CRYP_IMSCR_INIM (1 << 0)
213
214/* OUTIM: Output FIFO service interrupt mask */
215#define CRYP_IMSCR_OUTIM (1 << 1)
216
217/* --- CRYP_RISR values ---------------------------------------------------- */
218
219/* INRIS: Input FIFO service raw interrupt status */
220#define CRYP_RISR_INRIS (1 << 0)
221
222/* OUTRIS: Output FIFO service raw data */
223#define CRYP_RISR_OUTRIS (1 << 0)
224
225/* --- CRYP_MISR values ---------------------------------------------------- */
226
227/* INMIS: Input FIFO service masked interrupt status */
228#define CRYP_MISR_INMIS (1 << 0)
229
230/* OUTMIS: Output FIFO service masked interrupt status */
231#define CRYP_MISR_OUTMIS (1 << 0)
232
233/**@}*/
234
235/** @defgroup crypto_api_gen API (Generic)
236 *
237 * @brief API for the CRYP controller
238 *
239 * @ingroup crypto_defines
240 */
241/**@{*/
242
257 DECRYPT_AES_CTR = CRYP_CR_ALGOMODE_AES_CTR,/* XOR is same ENC as DEC */
258};
263};
265
270};
271
273void crypto_wait_busy(void);
274void crypto_set_key(enum crypto_keysize keysize, uint64_t key[]);
275void crypto_set_iv(uint64_t iv[]);
276void crypto_set_datatype(enum crypto_datatype datatype);
277void crypto_set_algorithm(enum crypto_mode mode);
278void crypto_start(void);
279void crypto_stop(void);
280uint32_t crypto_process_block(uint32_t *inp, uint32_t *outp, uint32_t length);
282/**@}*/
283/**@}*/
284#endif
285/** @cond */
286#else
287#warning "crypto_common_f24.h should not be included explicitly, "
288 "only via crypto.h"
289#endif
290/** @endcond */
#define END_DECLS
Definition: common.h:34
#define BEGIN_DECLS
Definition: common.h:33
void crypto_set_algorithm(enum crypto_mode mode)
Set the algorithm for Encryption/decryption.
crypto_datatype
void crypto_set_iv(uint64_t iv[])
Set Initialization Vector.
void crypto_start(void)
Enable the cryptographic controller and start processing.
crypto_keysize
uint32_t crypto_process_block(uint32_t *inp, uint32_t *outp, uint32_t length)
Start of encryption or decryption on data buffers.
void crypto_set_key(enum crypto_keysize keysize, uint64_t key[])
Set key value to the controller.
crypto_mode
void crypto_stop(void)
Disable the cryptographic controller and stop processing.
void crypto_set_datatype(enum crypto_datatype datatype)
Set the order of the data to be crypted.
void crypto_wait_busy(void)
Wait, if the Controller is busy.
@ CRYPTO_DATA_BIT
@ CRYPTO_DATA_8BIT
@ CRYPTO_DATA_16BIT
@ CRYPTO_DATA_32BIT
@ CRYPTO_KEY_256BIT
@ CRYPTO_KEY_192BIT
@ CRYPTO_KEY_128BIT
@ DECRYPT_AES_ECB
@ ENCRYPT_TDES_CBC
@ DECRYPT_DES_CBC
@ DECRYPT_AES_CBC
@ ENCRYPT_TDES_ECB
@ DECRYPT_AES_CTR
@ ENCRYPT_AES_CTR
@ ENCRYPT_AES_ECB
@ DECRYPT_DES_ECB
@ ENCRYPT_DES_CBC
@ DECRYPT_TDES_CBC
@ DECRYPT_TDES_ECB
@ ENCRYPT_DES_ECB
@ ENCRYPT_AES_CBC
#define CRYP_CR_ALGOMODE_AES_CTR
#define CRYP_CR_ALGOMODE_DES_ECB
#define CRYP_CR_ALGOMODE_DES_CBC
#define CRYP_CR_ALGODIR
#define CRYP_CR_ALGOMODE_AES_CBC
#define CRYP_CR_ALGOMODE_AES_ECB
#define CRYP_CR_ALGOMODE_TDES_CBC
#define CRYP_CR_ALGOMODE_TDES_ECB