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#define | SCB_ICSR_NMIPENDSET (1 << 31) |
| NMIPENDSET: NMI set-pending bit. More...
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#define | SCB_ICSR_PENDSVSET (1 << 28) |
| PENDSVSET: PendSV set-pending bit. More...
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#define | SCB_ICSR_PENDSVCLR (1 << 27) |
| PENDSVCLR: PendSV clear-pending bit. More...
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#define | SCB_ICSR_PENDSTSET (1 << 26) |
| PENDSTSET: SysTick exception set-pending bit. More...
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#define | SCB_ICSR_PENDSTCLR (1 << 25) |
| PENDSTCLR: SysTick exception clear-pending bit. More...
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#define | SCB_ICSR_ISRPREEMPT (1 << 23) |
| Bit 23: reserved for debug - reads as 0 when not in debug mode. More...
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#define | SCB_ICSR_ISRPENDING (1 << 22) |
| ISRPENDING: Interrupt pending flag, excluding NMI and Faults. More...
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#define | SCB_ICSR_VECTPENDING_LSB 12 |
| VECTPENDING[21:12] Pending vector. More...
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#define | SCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB) |
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#define | SCB_ICSR_RETOBASE (1 << 11) |
| RETOBASE: Return to base level. More...
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#define | SCB_ICSR_VECTACTIVE_LSB 0 |
| VECTACTIVE[8:0] Active vector. More...
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#define | SCB_ICSR_VECTACTIVE (0x1FF << SCB_ICSR_VECTACTIVE_LSB) |
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