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#define | DAC_CR_DMAUDRIE2 (1 << 29) |
| DMAUDRIE2: DAC channel2 DMA underrun interrupt enable. More...
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#define | DAC_CR_DMAEN2 (1 << 28) |
| DMAEN2: DAC channel2 DMA enable. More...
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#define | DAC_CR_MAMP2_SHIFT 24 |
| MAMP2[3:0]: DAC channel2 mask/amplitude selector field position. More...
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#define | DAC_CR_WAVEx_MASK 0x3 |
| Wave generation mode mask size. More...
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#define | DAC_CR_WAVE2_SHIFT 22 |
| WAVE2[1:0]: DAC channel2 wave generation mode. More...
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#define | DAC_CR_EN2 (1 << 16) |
| EN2: DAC channel2 enable. More...
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#define | DAC_CR_DMAUDRIE1 (1 << 13) |
| DMAUDRIE1: DAC channel1 DMA underrun interrupt enable. More...
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#define | DAC_CR_DMAEN1 (1 << 12) |
| DMAEN1: DAC channel1 DMA enable. More...
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#define | DAC_CR_MAMP1_SHIFT 8 |
| MAMP1[3:0]: DAC channel1 mask/amplitude selector field position. More...
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#define | DAC_CR_MAMPx_MASK 0xf |
| MAMP Mask/Amplitude selector field size. More...
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#define | DAC_CR_WAVE1_SHIFT 6 |
| WAVE1[1:0]: DAC channel1 wave generation mode. More...
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#define | DAC_CR_EN1 (1 << 0) |
| EN1: DAC channel1 enable. More...
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#define | DAC_CR_TSEL2_SHIFT 19 |
| TSEL2[2:0]: DAC channel2 trigger selection. More...
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#define | DAC_CR_TEN2 (1 << 18) |
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#define | DAC_CR_BOFF2 (1 << 17) |
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#define | DAC_CR_TSEL1_SHIFT 3 |
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#define | DAC_CR_TEN1 (1 << 2) |
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#define | DAC_CR_BOFF1 (1 << 1) |
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