libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
usart_common_f24.h
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1/** @addtogroup usart_defines
2
3@author @htmlonly &copy; @endhtmlonly 2011 Uwe Hermann <uwe@hermann-uwe.de>
4@author @htmlonly &copy; @endhtmlonly 2011 Stephen Caudle <scaudle@doceme.com>
5
6*/
7/*
8 * This file is part of the libopencm3 project.
9 *
10 * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
11 * Copyright (C) 2011 Stephen Caudle <scaudle@doceme.com>
12 *
13 * This library is free software: you can redistribute it and/or modify
14 * it under the terms of the GNU Lesser General Public License as published by
15 * the Free Software Foundation, either version 3 of the License, or
16 * (at your option) any later version.
17 *
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU Lesser General Public License for more details.
22 *
23 * You should have received a copy of the GNU Lesser General Public License
24 * along with this library. If not, see <http://www.gnu.org/licenses/>.
25 */
26
27/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA USART.H
28The order of header inclusion is important. usart.h includes the device
29specific memorymap.h header before including this header file.*/
30
31/** @cond */
32#ifdef LIBOPENCM3_USART_H
33/** @endcond */
34#ifndef LIBOPENCM3_USART_COMMON_F24_H
35#define LIBOPENCM3_USART_COMMON_F24_H
36
38
39/* --- Convenience macros -------------------------------------------------- */
40
41/** @addtogroup usart_reg_base USART register base addresses
42 * Holds all the U(S)ART peripherals supported.
43 * @{
44 */
45#define USART6 USART6_BASE
46#define UART7 UART7_BASE
47#define UART8 UART8_BASE
48/**@}*/
49
50/* --- USART registers ----------------------------------------------------- */
51
52/* Status register (USARTx_SR) */
53#define USART6_SR USART_SR(USART6_BASE)
54#define UART7_SR USART_SR(UART7)
55#define UART8_SR USART_SR(UART8)
56
57/* Data register (USARTx_DR) */
58#define USART6_DR USART_DR(USART6_BASE)
59#define UART7_DR USART_DR(UART7)
60#define UART8_DR USART_DR(UART8)
61
62/* Baud rate register (USARTx_BRR) */
63#define USART6_BRR USART_BRR(USART6_BASE)
64#define UART7_BRR USART_BRR(UART7)
65#define UART8_BRR USART_BRR(UART8)
66
67/* Control register 1 (USARTx_CR1) */
68#define USART6_CR1 USART_CR1(USART6_BASE)
69#define UART7_CR1 USART_CR1(UART7)
70#define UART8_CR1 USART_CR1(UART8)
71
72/* Control register 2 (USARTx_CR2) */
73#define USART6_CR2 USART_CR2(USART6_BASE)
74#define UART7_CR2 USART_CR2(UART7)
75#define UART8_CR2 USART_CR2(UART8)
76
77/* Control register 3 (USARTx_CR3) */
78#define USART6_CR3 USART_CR3(USART6_BASE)
79#define UART7_CR3 USART_CR3(UART7)
80#define UART8_CR3 USART_CR3(UART8)
81
82/* Guard time and prescaler register (USARTx_GTPR) */
83#define USART6_GTPR USART_GTPR(USART6_BASE)
84#define UART7_GTPR USART_GTPR(UART7)
85#define UART8_GTPR USART_GTPR(UART8)
86
87/* --- USART_CR1 values ---------------------------------------------------- */
88
89/* OVER8: Oversampling mode */
90#define USART_CR1_OVER8 (1 << 15)
91
92/* --- USART_CR3 values ---------------------------------------------------- */
93
94/* ONEBIT: One sample bit method enable */
95#define USART_CR3_ONEBIT (1 << 11)
96
97#endif
98/** @cond */
99#else
100#warning "usart_common_f24.h should not be included directly, only via usart.h"
101#endif
102/** @endcond */
103