libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
adc_common_v1_multi.c
Go to the documentation of this file.
1/** @addtogroup adc_file ADC peripheral API
2@ingroup peripheral_apis
3
4@author @htmlonly © @endhtmlonly 2012
5Ken Sarkies <ksarkies@internode.on.net>
6
7@date 30 August 2012
8
9This library supports the A/D Converter Control System in the STM32 series
10of ARM Cortex Microcontrollers by ST Microelectronics.
11
12Devices can have up to three A/D converters each with their own set of
13registers. However all the A/D converters share a common clock which is
14prescaled from the APB2 clock by default by a minimum factor of 2 to a maximum
15of 8. The ADC resolution can be set to 12, 10, 8 or 6 bits.
16
17Each A/D converter has multiple channels, not all of which might be available
18externally. Internal channels can be used for the the temperature sensor,
19VBat monitoring, and the internal reference voltage VREFINT. Consult the
20Reference manual for the specifics of your part.
21@sa ADC_MAX_CHANNELS
22@sa ADC_CHANNEL_TEMP
23@sa ADC_CHANNEL_VREF
24@sa ADC_CHANNEL_VBAT
25
26The conversions can occur as a one-off conversion whereby the process stops
27once conversion is complete. The conversions can also be continuous wherein a
28new conversion starts immediately the previous conversion has ended.
29
30Conversion can occur as a single channel conversion or a scan of a group of
31channels in either continuous or one-off mode. If more than one channel is
32converted in a scan group, DMA must be used to transfer the data as there is
33only one result register available. An interrupt can be set to occur at the end
34of conversion, which occurs after all channels have been scanned.
35
36A discontinuous mode allows a subgroup of group of a channels to be converted
37in bursts of a given length.
38
39Injected conversions allow a second group of channels to be converted
40separately from the regular group. An interrupt can be set to occur at the end
41of conversion, which occurs after all channels have been scanned.
42
43@section adc_api_ex Basic ADC Handling API.
44
45Example 1: Simple single channel conversion polled. Enable the peripheral clock
46and ADC, reset ADC and set the prescaler divider. Set the sample time to a
47minimum of 3 cycles. Set multiple mode to independent.
48
49@code
50gpio_mode_setup(GPIOA, GPIO_MODE_ANALOG, GPIO_PUPD_NONE, GPIO1);
51rcc_periph_clock_enable(RCC_ADC1);
52adc_set_clk_prescale(ADC_CCR_ADCPRE_BY2);
53adc_disable_scan_mode(ADC1);
54adc_set_single_conversion_mode(ADC1);
55adc_set_sample_time(ADC1, ADC_CHANNEL0, ADC_SMPR_SMP_3CYC);
56uint8_t channels[] = ADC_CHANNEL0;
57adc_set_regular_sequence(ADC1, 1, channels);
58adc_set_multi_mode(ADC_CCR_MULTI_INDEPENDENT);
59adc_power_on(ADC1);
60adc_start_conversion_regular(ADC1);
61while (!adc_eoc(ADC1));
62reg16 = adc_read_regular(ADC1);
63@endcode
64
65LGPL License Terms @ref lgpl_license
66 */
67/*
68 * This file is part of the libopencm3 project.
69 *
70 * Copyright (C) 2012 Ken Sarkies <ksarkies@internode.on.net>
71 *
72 * This library is free software: you can redistribute it and/or modify
73 * it under the terms of the GNU Lesser General Public License as published by
74 * the Free Software Foundation, either version 3 of the License, or
75 * (at your option) any later version.
76 *
77 * This library is distributed in the hope that it will be useful,
78 * but WITHOUT ANY WARRANTY; without even the implied warranty of
79 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
80 * GNU Lesser General Public License for more details.
81 *
82 * You should have received a copy of the GNU Lesser General Public License
83 * along with this library. If not, see <http://www.gnu.org/licenses/>.
84 */
85
87
88/**@{*/
89
90
91/*---------------------------------------------------------------------------*/
92/** @brief ADC Power On
93
94If the ADC is in power-down mode then it is powered up. The application needs
95to wait a time of about 3 microseconds for stabilization before using the ADC.
96If the ADC is already on this function call will have no effect.
97 * NOTE Common with L1 and F2
98
99@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
100*/
101
102void adc_power_on(uint32_t adc)
103{
104 ADC_CR2(adc) |= ADC_CR2_ADON;
105}
106
107/*---------------------------------------------------------------------------*/
108/** @brief ADC Set Clock Prescale
109The ADC clock can be prescaled.
110The Clock sources and scaler values are part specific.
111@param[in] prescale Prescale value for ADC Clock @ref adc_ccr_adcpre
112*/
113
114void adc_set_clk_prescale(uint32_t prescale)
115{
116 uint32_t reg32 = ((ADC_CCR & ~ADC_CCR_ADCPRE_MASK) | prescale);
117 ADC_CCR = reg32;
118}
119
120/*---------------------------------------------------------------------------*/
121/** @brief ADC Enable an External Trigger for Regular Channels
122
123This enables an external trigger for set of defined regular channels, and sets
124the polarity of the trigger event: rising or falling edge or both. Note that if
125the trigger polarity is zero, triggering is disabled.
126
127@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
128@param[in] trigger Unsigned int32. Trigger identifier @ref adc_trigger_regular
129@param[in] polarity Unsigned int32. Trigger polarity @ref
130adc_trigger_polarity_regular
131*/
132
133void adc_enable_external_trigger_regular(uint32_t adc, uint32_t trigger,
134 uint32_t polarity)
135{
136 uint32_t reg32 = ADC_CR2(adc);
137
139 reg32 |= (trigger | polarity);
140 ADC_CR2(adc) = reg32;
141}
142
143/*---------------------------------------------------------------------------*/
144/** @brief ADC Disable an External Trigger for Regular Channels
145
146@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
147*/
148
150{
151 ADC_CR2(adc) &= ~ADC_CR2_EXTEN_MASK;
152}
153
154/*---------------------------------------------------------------------------*/
155/** @brief ADC Enable an External Trigger for Injected Channels
156
157This enables an external trigger for set of defined injected channels, and sets
158the polarity of the trigger event: rising or falling edge or both.
159
160@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
161@param[in] trigger Unsigned int8. Trigger identifier @ref adc_trigger_injected
162@param[in] polarity Unsigned int32. Trigger polarity @ref
163adc_trigger_polarity_injected
164*/
165
166void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger,
167 uint32_t polarity)
168{
169 uint32_t reg32 = ADC_CR2(adc);
170
172 reg32 |= (trigger | polarity);
173 ADC_CR2(adc) = reg32;
174}
175
176/*---------------------------------------------------------------------------*/
177/** @brief ADC Disable an External Trigger for Injected Channels
178
179@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
180*/
181
183{
184 ADC_CR2(adc) &= ~ADC_CR2_JEXTEN_MASK;
185}
186
187/*---------------------------------------------------------------------------*/
188/** @brief ADC Set Resolution
189
190ADC Resolution can be reduced from 12 bits to 10, 8 or 6 bits for a
191corresponding reduction in conversion time (resolution + 3 ADC clock cycles).
192
193@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
194@param[in] resolution Unsigned int32. Resolution value @ref adc_cr1_res
195*/
196
197void adc_set_resolution(uint32_t adc, uint32_t resolution)
198{
199 uint32_t reg32 = ADC_CR1(adc);
200
201 reg32 &= ~ADC_CR1_RES_MASK;
202 reg32 |= resolution;
203 ADC_CR1(adc) = reg32;
204}
205
206/*---------------------------------------------------------------------------*/
207/** @brief ADC Enable the Overrun Interrupt
208
209The overrun interrupt is generated when data is not read from a result register
210before the next conversion is written. If DMA is enabled, all transfers are
211terminated and any conversion sequence is aborted.
212
213@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
214*/
215
217{
218 ADC_CR1(adc) |= ADC_CR1_OVRIE;
219}
220
221/*---------------------------------------------------------------------------*/
222/** @brief ADC Disable the Overrun Interrupt
223
224@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
225*/
226
228{
229 ADC_CR1(adc) &= ~ADC_CR1_OVRIE;
230}
231
232/*---------------------------------------------------------------------------*/
233/** @brief ADC Read the Overrun Flag
234
235The overrun flag is set when data is not read from a result register before the
236next conversion is written. If DMA is enabled, all transfers are terminated and
237any conversion sequence is aborted.
238
239@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
240@returns Unsigned int32 conversion result.
241*/
242
243bool adc_get_overrun_flag(uint32_t adc)
244{
245 return ADC_SR(adc) & ADC_SR_OVR;
246}
247
248/*---------------------------------------------------------------------------*/
249/** @brief ADC Clear Overrun Flags
250
251The overrun flag is cleared. Note that if an overrun occurs, DMA is terminated.
252The flag must be cleared and the DMA stream and ADC reinitialised to resume
253conversions (see the reference manual).
254
255@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
256@returns Unsigned int32 conversion result.
257*/
258
259void adc_clear_overrun_flag(uint32_t adc)
260{
261/* need to write zero to clear this */
262 ADC_SR(adc) &= ~ADC_SR_OVR;
263}
264
265/*---------------------------------------------------------------------------*/
266/** @brief ADC Enable an EOC for Each Conversion
267
268The EOC is set after each conversion in a sequence rather than at the end of the
269sequence. Overrun detection is enabled only if DMA is enabled.
270
271@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
272*/
273
274void adc_eoc_after_each(uint32_t adc)
275{
276 ADC_CR2(adc) |= ADC_CR2_EOCS;
277}
278
279/*---------------------------------------------------------------------------*/
280/** @brief ADC Disable the EOC for Each Conversion
281
282The EOC is set at the end of each sequence rather than after each conversion in
283the sequence. Overrun detection is enabled always.
284
285@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
286*/
287
288void adc_eoc_after_group(uint32_t adc)
289{
290 ADC_CR2(adc) &= ~ADC_CR2_EOCS;
291}
292
293/*---------------------------------------------------------------------------*/
294/** @brief ADC Set DMA to Continue
295
296This must be set to allow DMA to continue to operate after the last conversion
297in the DMA sequence. This allows DMA to be used in continuous circular mode.
298
299@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
300*/
301
302void adc_set_dma_continue(uint32_t adc)
303{
304 ADC_CR2(adc) |= ADC_CR2_DDS;
305}
306
307/*---------------------------------------------------------------------------*/
308/** @brief ADC Set DMA to Terminate
309
310This must be set to allow DMA to terminate after the last conversion in the DMA
311sequence. This can avoid overrun errors.
312
313@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
314*/
315
316void adc_set_dma_terminate(uint32_t adc)
317{
318 ADC_CR2(adc) &= ~ADC_CR2_DDS;
319}
320/*---------------------------------------------------------------------------*/
321/** @brief ADC Read the Analog Watchdog Flag
322
323This flag is set when the converted voltage crosses the high or low thresholds.
324
325@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
326@returns bool. AWD flag.
327*/
328
329bool adc_awd(uint32_t adc)
330{
331 return ADC_SR(adc) & ADC_SR_AWD;
332}
333
334/*---------------------------------------------------------------------------*/
335/** @brief ADC Enable The Temperature Sensor
336
337This enables both the sensor and the reference voltage measurements on ADC1.
338On STM32F42x and STM32F43x, the temperature sensor is
339connected to ADC1 channel 18, the same as VBat. If both are enabled, only the
340VBat conversion is performed.
341*/
342
344{
346}
347
348/*---------------------------------------------------------------------------*/
349/** @brief ADC Disable The Temperature Sensor
350
351Disabling this will reduce power consumption from the sensor and the reference
352voltage measurements.
353*/
354
356{
357 ADC_CCR &= ~ADC_CCR_TSVREFE;
358}
359
360/**@}*/
#define ADC_CR2_DDS
#define ADC_CR2_JEXTSEL_MASK
#define ADC_CR2(block)
Definition: adc_common_v1.h:58
#define ADC_CR1(block)
Definition: adc_common_v1.h:55
#define ADC_CR2_ADON
#define ADC_CCR
#define ADC_CR2_JEXTEN_MASK
#define ADC_SR(block)
Definition: adc_common_v1.h:52
#define ADC_CR1_OVRIE
#define ADC_CR2_EXTEN_MASK
#define ADC_CR2_EXTSEL_MASK
#define ADC_CR2_EOCS
#define ADC_CCR_TSVREFE
void adc_disable_temperature_sensor(void)
ADC Disable The Temperature Sensor.
void adc_disable_overrun_interrupt(uint32_t adc)
ADC Disable the Overrun Interrupt.
void adc_set_dma_terminate(uint32_t adc)
ADC Set DMA to Terminate.
void adc_clear_overrun_flag(uint32_t adc)
ADC Clear Overrun Flags.
void adc_set_dma_continue(uint32_t adc)
ADC Set DMA to Continue.
void adc_power_on(uint32_t adc)
ADC Power On.
void adc_set_resolution(uint32_t adc, uint32_t resolution)
ADC Set Resolution.
void adc_enable_external_trigger_regular(uint32_t adc, uint32_t trigger, uint32_t polarity)
ADC Enable an External Trigger for Regular Channels.
void adc_enable_temperature_sensor(void)
ADC Enable The Temperature Sensor.
void adc_eoc_after_each(uint32_t adc)
ADC Enable an EOC for Each Conversion.
void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger, uint32_t polarity)
ADC Enable an External Trigger for Injected Channels.
void adc_set_clk_prescale(uint32_t prescale)
ADC Set Clock Prescale The ADC clock can be prescaled.
void adc_disable_external_trigger_injected(uint32_t adc)
ADC Disable an External Trigger for Injected Channels.
void adc_enable_overrun_interrupt(uint32_t adc)
ADC Enable the Overrun Interrupt.
bool adc_awd(uint32_t adc)
ADC Read the Analog Watchdog Flag.
void adc_eoc_after_group(uint32_t adc)
ADC Disable the EOC for Each Conversion.
bool adc_get_overrun_flag(uint32_t adc)
ADC Read the Overrun Flag.
void adc_disable_external_trigger_regular(uint32_t adc)
ADC Disable an External Trigger for Regular Channels.
#define ADC_SR_OVR
Overrun.
#define ADC_SR_AWD
Analog watchdog flag.