libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
cm3/memorymap.h File Reference
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Macros

#define PPBI_BASE   (0xE0000000U)
 
#define SCS_BASE   (PPBI_BASE + 0xE000)
 
#define SYS_TICK_BASE   (SCS_BASE + 0x0010)
 
#define NVIC_BASE   (SCS_BASE + 0x0100)
 
#define SCB_BASE   (SCS_BASE + 0x0D00)
 
#define MPU_BASE   (SCS_BASE + 0x0D90)
 
#define DEBUG_BASE   (SCS_BASE + 0x0DF0)
 
#define CORESIGHT_LSR_OFFSET   0xfb4
 
#define CORESIGHT_LAR_OFFSET   0xfb0
 
#define CORESIGHT_LSR_SLK   (1<<1)
 CoreSight Lock Status Register lock status bit. More...
 
#define CORESIGHT_LSR_SLI   (1<<0)
 CoreSight Lock Status Register lock availability bit. More...
 
#define CORESIGHT_LAR_KEY   0xC5ACCE55
 CoreSight Lock Access key, common for all. More...
 

Macro Definition Documentation

◆ DEBUG_BASE

#define DEBUG_BASE   (SCS_BASE + 0x0DF0)

Definition at line 74 of file cm3/memorymap.h.

◆ MPU_BASE

#define MPU_BASE   (SCS_BASE + 0x0D90)

Definition at line 69 of file cm3/memorymap.h.

◆ NVIC_BASE

#define NVIC_BASE   (SCS_BASE + 0x0100)

Definition at line 63 of file cm3/memorymap.h.

◆ PPBI_BASE

#define PPBI_BASE   (0xE0000000U)

Definition at line 26 of file cm3/memorymap.h.

◆ SCB_BASE

#define SCB_BASE   (SCS_BASE + 0x0D00)

Definition at line 66 of file cm3/memorymap.h.

◆ SCS_BASE

#define SCS_BASE   (PPBI_BASE + 0xE000)

Definition at line 42 of file cm3/memorymap.h.

◆ SYS_TICK_BASE

#define SYS_TICK_BASE   (SCS_BASE + 0x0010)

Definition at line 60 of file cm3/memorymap.h.