LPTIM_CR Control Register
Collaboration diagram for LPTIM_CR Control Register:
Macros | |
| #define | LPTIM_CR_COUNTRST (1 << 3) |
| COUNTRST Counter reset. More... | |
| #define | LPTIM_CR_RSTARE (1 << 4) |
| RSTARE Reset after read enable. More... | |
| #define | LPTIM_CR_ENABLE (1 << 0) |
| ENABLE: LPTIM Enable. More... | |
| #define | LPTIM_CR_SNGSTRT (1 << 1) |
| SNGSTRT: Start in Single Mode. More... | |
| #define | LPTIM_CR_CNTSTRT (1 << 2) |
| CNGSTRT: Start in Continuous Mode. More... | |
Detailed Description
Macro Definition Documentation
◆ LPTIM_CR_CNTSTRT
| #define LPTIM_CR_CNTSTRT (1 << 2) |
CNGSTRT: Start in Continuous Mode.
Definition at line 254 of file lptimer_common_all.h.
◆ LPTIM_CR_COUNTRST
| #define LPTIM_CR_COUNTRST (1 << 3) |
COUNTRST Counter reset.
Definition at line 48 of file g0/lptimer.h.
◆ LPTIM_CR_ENABLE
| #define LPTIM_CR_ENABLE (1 << 0) |
ENABLE: LPTIM Enable.
Definition at line 248 of file lptimer_common_all.h.
◆ LPTIM_CR_RSTARE
| #define LPTIM_CR_RSTARE (1 << 4) |
RSTARE Reset after read enable.
Definition at line 50 of file g0/lptimer.h.
◆ LPTIM_CR_SNGSTRT
| #define LPTIM_CR_SNGSTRT (1 << 1) |
SNGSTRT: Start in Single Mode.
Definition at line 251 of file lptimer_common_all.h.
