STM32H7

Here is a list of all modules:

[detail level 1234]

▼CM3 Defines	Defined Constants and Types for Cortex M3 core features
Debugging	Macros and functions to aid in debugging
►Cortex Core Defines	libopencm3 Defined Constants and Types for the Cortex Core
Cortex Core Atomic support Defines	Atomic operation support
Cortex-M Data Watch and Trace unit.	System Control Space (SCS) => Data Watchpoint and Trace (DWT)
Cortex-M Flash Patch and Breakpoint (FPB) unit
Cortex-M Instrumentation Trace Macrocell (ITM)
►Cortex-M MPU Defines	libopencm3 Cortex Memory Protection Unit
MPU Registers
MPU TYPE register fields	The MPU_TYPE register is always available, even if the MPU is not implemented
MPU CTRL register fields	Defines for the Control Register
MPU RNR register fields	Defines for the Region Number Register
MPU RBAR register fields	Defines for the Region Base Address Register
►MPU RASR register fields	Defines for the Region Attribute and Size Register
MPU RASR Attributes	Not all attributes are available on v6m
►Cortex-M NVIC Defines	libopencm3 Cortex Nested Vectored Interrupt Controller
NVIC Registers
Cortex M0/M3/M4 System Interrupts	IRQ numbers -3 and -6 to -9 are reserved
User interrupts for STM32 H7 series
►Cortex-M System Control Block	The System Control Block is a section of the System Control Space
SCB Registers
SCB_CPUID Values
SCB_ICSR Values
SCB_VTOR Values
SCB_AICR Values
SCB_SCR Values
SCB_CCR Values
►Cortex-M System Control Space	The System Control Space (SCS) is a memory-mapped 4KB address space that provides 32-bit registers for configuration, status reporting and control
SCS Registers
►Cortex-M SysTick Defines	libopencm3 Defined Constants and Types for the Cortex SysTick
►STK_CSR Values
Clock source selection
STK_RVR Values
STK_CALIB Values
Cortex-M Trace Port Interface Unit (TPIU)
▼Cortex Core Peripheral APIs	APIs for Cortex Core peripherals
DWT	libopencm3 Cortex-M Data Watchpoint and Trace unit
NVIC	libopencm3 Cortex Nested Vectored Interrupt Controller
SCB	libopencm3 Cortex-M System Control Block
SysTick	libopencm3 Cortex System Tick Timer
Coresight Registers	CoreSight Lock Status Registers and Lock Access Registers are documented for the DWT, ITM, FPB and TPIU peripherals
▼Peripheral APIs	APIs for device peripherals
PWR Peripheral API
RCC peripheral API	This library supports the Reset and Clock Control System in the STM32 series of ARM Cortex Microcontrollers by ST Microelectronics
QuadSPI peripheral API	APIs for the specialized SPI Flash peripheral
USART peripheral API
DAC peripheral API	Digital to Analog Converter
EXTI peripheral API
FLASH peripheral API
FMC peripheral API
GPIO peripheral API
RNG peripheral API	This library supports "version 1" of the random number generator peripheral (RNG) in the STM32 series of ARM Cortex Microcontrollers by ST Microelectronics
SPI peripheral API
TIMER peripheral API
FDCAN peripheral API	libopencm3 STM32 FDCAN
STM32H7xx	Libraries for ST Microelectronics STM32H7xx series
▼STM32Hxx Defines	Defined Constants and Types for the STM32H7xx series
►DAC Defines	Defined Constants and Types for the STM32H7xx DAC
DAC register base addresses
DAC Registers
►DAC_CR values
DAC Channel 2 Trigger Source Selection
DAC Channel 1 Trigger Source Selection
DAC_SWTRIGR Values
DAC_DHRxxx Values
DAC_DORx Values
DAC_SR Values
DAC Channel Identifier
DAC_CCR values
►DAC_MCR values
DAC Channel 2 Mode Selection
High frequency interface mode selection
DAC Channel 1 Mode Selection
DAC Channel 1 Sawtooth Direction Setting
DAC Channel 2 Sawtooth Direction Setting
DAC Channel 2 Sawtooth Increment Trigger
DAC Channel 2 Sawtooth Reset Trigger
DAC Channel 1 Sawtooth Increment Trigger
DAC Channel 1 Sawtooth Reset Trigger
►EXTI Defines	Defined Constants and Types for the STM32H7xx EXTI Control
EXTI Registers
►FDCAN Defines
FDCAN block base addresses
Named constants for FIFOs
registers file in each FDCAN block.
FDCAN CC control register bits
FDCAN interrupt register flags
FDCAN interrupt enable flags
FDCAN_ILS interrupt line select flags
FDCAN_TXBRP Transmit request pending bits
FDCAN_TXBAR Transmit buffer add request bits
FDCAN_TXBCR Transmit buffer cancel request bits
FDCAN_TXBTO Transmit buffer transfer occured bits
FDCAN_TXBCF Transmit buffer cancellation finished bits
FDCAN_TXBTIE Transmit interrupt enable bits	Each bit enables or disables transmit interrupt for transmit buffer slot
FDCAN_TXBCIE Transmit cancelled interrupt enable bits	Each bit enables or disables transmit cancelled interrupt for transmit buffer slot
Standard ID filter match type	Matching strategy for standard ID filters
Standard ID filter action	Defines possible actions for standard ID filters
Extended ID filter action	These are possible actions, extended filter can have
Extended ID filter match type	Matching strategy for extended ID filters
FIFO / buffer flags
FDCAN error return values
►FLASH Defines	Defined Constants and Types for the STM32H7xx Flash controller
►Flash Registers
FLASH_ACR values	Access Control register values
FLASH Wait States
FLASH_ACR values	Access Control register values
Flash programming width
FMC Defines	Defined Constants and Types for the STM32H7xx Flexible Memory Controller
►GPIO Defines	Defined Constants and Types for the STM32H7xx General Purpose I/O
GPIO Pin Identifiers
GPIO Port IDs
GPIO Pin Direction and Analog/Digital Mode
GPIO Output Pin Driver Type
GPIO Output Pin Speed
GPIO Output Pin Pullup
Alternate Function Pin Selection
►PWR Defines	Defined Constants and Types for the STM32H7xx Power Control
PWR Registers
SMPS step-down converter voltage output level selection	This setting is used when both the LDO and SMPS step-down converter are enabled with SMPSEN and LDOEN enabled or when SMPSEXTHP is enabled
PWR Peripheral API
►QuadSPI Defines	Defined constants and types for the STM32H7 QuadSPI peripheral
QuadSPI Registers
►RCC Defines	Defined Constants and Types for the STM32H7xx Reset and Clock Control
►RCC Registers
RCC_CR Values
RCC_CFGR Values
RCC_D1CFGR Values
RCC_D2CFGR Values
RCC_D3CFGR Values
RCC_PLLCKSELR Values
RCC_PLLCFGR Values
RCC_PLLnDIVR Values
RCC_BDCR Values
RCC_CSR Values.
RCC_D1CCIP1R Values
RCC_D2CCIP1R Values
RCC_D2CCIP2R Values
RCC_CR Values
RCC_CFGR Values
RCC_D1CFGR Values
RCC_D2CFGR Values
RCC_D3CFGR Values
RCC_PLLCKSELR Values
RCC_PLLCFGR Values
RCC_PLLnDIVR Values
RCC_BDCR Values
RCC_CSR Values.
RCC_D1CCIP1R Values
RCC_D2CCIP1R Values
RCC_D2CCIP2R Values
►SPI Defines	Defined Constants and Types for the STM32H7xx SPI
SPI Register base address
SPI lsb/msb first
SPI peripheral baud rates
SPI peripheral baud rate prescale values
SPI clock polarity
SPI clock phase
SPI crc length
SPI data size
►SYSCFG Defines	Defined Constants and Types for the STM32H7xx System Configuration controller
►SYSCFG Registers	
PWRCR SYSCFG configuration register
PWRCR SYSCFG configuration register
►SPI Defines	Defined Constants and Types for the STM32H7xx Timers
Timer register base addresses
TIMx_CR1 CKD[1:0] Clock Division Ratio
TIMx_CR1 CMS[1:0]: Center-aligned Mode Selection
TIMx_CR1 DIR: Direction
TIMx_CR2_OIS: Force Output Idle State Control Values
TIMx_CR2 MMS[6:4]: Master Mode Selection
TIMx_SMCR TS Trigger selection
TIMx_SMCR SMS Slave mode selection
TIMx_DIER Timer DMA and Interrupt Enable Values
TIMx_SR Timer Status Register Flags
TIMx_EGR Timer Event Generator Values
TIM_BDTR_LOCK Timer Lock Values
►USART Defines	Defined Constants and Types for the STM32H7xx USART
USART register base addresses	Holds all the U(S)ART peripherals supported
USART Parity Selection
USART Tx/Rx Mode Selection
USART Stop Bit Selection
USART Hardware Flow Control Selection
USART Registers
U(S)ART convenience Flags	We define the "common" lower flag bits using a standard name, allowing them to be used regardless of which usart peripheral version you have
USART_CR1 Values
►USART_CR2 Values
Auto baud rate mode	ABRMOD[1:0]: Auto baud rate mode
USART_CR3 Values
USART_GTPR Values
USART_RTOR Values
USART_RQR Values
USART_ISR Values
USART_ICR Values
USART_RDR/TDR Values
User interrupt service routines (ISR) prototypes for STM32 H7 series
User interrupt service routines (ISR) defaults for STM32 H7 series